From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IpuRf-0000dC-9A for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:36:27 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IpuRc-0000cs-Po for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:36:25 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IpuRc-0000cp-NA for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:36:24 -0500 Received: from blaster.systems.pipex.net ([62.241.163.7]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1IpuRc-0003Pe-7H for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:36:24 -0500 From: Paul Brook Subject: Re: [Qemu-devel] Removal of some target CPU macros Date: Wed, 7 Nov 2007 23:36:20 +0000 References: <473204A2.3030208@bellard.org> <4732425E.20601@bellard.org> <20071107231256.GG6510@aon.at> In-Reply-To: <20071107231256.GG6510@aon.at> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200711072336.21532.paul@nowt.org> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Wednesday 07 November 2007, Bernhard Fischer wrote: > On Wed, Nov 07, 2007 at 11:55:26PM +0100, Fabrice Bellard wrote: > >Why not adding a new CPU type such as "PPC970 with hypervisor" and keep > >the current PPC970 implementation as it is without the hypervisor mode. > >I don't see the problem in replacing the ifdefs with a new CPU model ! > >You cannot reasonnably tell that it is uglier than the current code. > > IMHO same for i386sx. Without an FPU there is just no FPU. Without > 486-specific instructions (or i586 etc. for that matter), the machine is > just constrained to the one requested by the user. > > The fact that usually too many non ISA-imposed features are available > without explicit user choice is very, very unfortunate, IMO. > As always, features are or may be nice, iff and only if you are not > forced to have or use them.. The i386 emulation always enables all features because noone's bothered to teach it which ones are optional. I have local ARM patches (hopefully will be merged into CVS soon) that implement 5+ different ISA variants, 3 different FPUs, a SIMD vector unit and 2 completely different exception models. All in the same binary, and all of which can be turned off if for emulating cpus that don't implement a particular feature. Paul