From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1Ir9xK-000615-Gi
	for qemu-devel@nongnu.org; Sun, 11 Nov 2007 05:22:18 -0500
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1Ir9xI-00060t-Qw
	for qemu-devel@nongnu.org; Sun, 11 Nov 2007 05:22:18 -0500
Received: from [199.232.76.173] (helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1Ir9xI-00060q-Fn
	for qemu-devel@nongnu.org; Sun, 11 Nov 2007 05:22:16 -0500
Received: from tapir.sajinet.com.pe ([66.139.79.212])
	by monty-python.gnu.org with esmtp (Exim 4.60)
	(envelope-from <carenas@sajinet.com.pe>) id 1Ir9xI-0006Xx-3v
	for qemu-devel@nongnu.org; Sun, 11 Nov 2007 05:22:16 -0500
Date: Sun, 11 Nov 2007 04:26:55 -0600
From: Carlo Marcelo Arenas Belon <carenas@sajinet.com.pe>
Message-ID: <20071111102655.GB25322@tapir>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Subject: [Qemu-devel] [PATCH] 64bit clean cris-softmmu
Reply-To: qemu-devel@nongnu.org
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: qemu-devel@nongnu.org

The following patch makes cris-softmmu compile in a 64bit host without
warnings by defining that the target CPU is 32bit explicitly and casting the
use of pointers into an uint32_t.

Carlo

---
Index: target-cris/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-cris/cpu.h,v
retrieving revision 1.3
diff -u -r1.3 cpu.h
--- target-cris/cpu.h	10 Nov 2007 15:15:52 -0000	1.3
+++ target-cris/cpu.h	11 Nov 2007 09:53:49 -0000
@@ -21,6 +21,7 @@
 #ifndef CPU_CRIS_H
 #define CPU_CRIS_H
 
+#define TARGET_PHYS_ADDR_BITS 32
 #define TARGET_LONG_BITS 32
 
 #include "cpu-defs.h"
Index: target-cris/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-cris/op_helper.c,v
retrieving revision 1.3
diff -u -r1.3 op_helper.c
--- target-cris/op_helper.c	29 Oct 2007 14:39:49 -0000	1.3
+++ target-cris/op_helper.c	11 Nov 2007 10:05:31 -0000
@@ -60,7 +60,7 @@
     if (__builtin_expect(ret, 0)) {
         if (retaddr) {
             /* now we have a real cpu fault */
-            pc = (target_phys_addr_t)retaddr;
+            pc = (target_phys_addr_t)(unsigned long)retaddr;
             tb = tb_find_pc(pc);
             if (tb) {
                 /* the PC is inside the translated code. It means that we have