From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Iy8YH-0005UP-Mi for qemu-devel@nongnu.org; Fri, 30 Nov 2007 11:17:17 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Iy8YD-0005Tw-8Z for qemu-devel@nongnu.org; Fri, 30 Nov 2007 11:17:17 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Iy8YD-0005Tt-09 for qemu-devel@nongnu.org; Fri, 30 Nov 2007 11:17:13 -0500 Received: from tapir.sajinet.com.pe ([66.139.79.212]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Iy8YC-0003YO-OK for qemu-devel@nongnu.org; Fri, 30 Nov 2007 11:17:13 -0500 Date: Fri, 30 Nov 2007 10:23:29 -0600 From: Carlo Marcelo Arenas Belon Message-ID: <20071130162329.GF28369@tapir> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH] sh4: define explicitly that the target CPU is 32 bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The following patch enforces that the sh4 target is 32 bit to prevent qemu to expand incorrectly to a 64 bit wide cpu if compiled in a 64 bit host. Carlo --- Index: target-sh4/cpu.h =================================================================== RCS file: /sources/qemu/qemu/target-sh4/cpu.h,v retrieving revision 1.12 diff -u -r1.12 cpu.h --- target-sh4/cpu.h 10 Nov 2007 15:15:53 -0000 1.12 +++ target-sh4/cpu.h 30 Nov 2007 16:08:38 -0000 @@ -22,6 +22,7 @@ #include "config.h" +#define TARGET_PHYS_ADDR_BITS 32 #define TARGET_LONG_BITS 32 #define TARGET_HAS_ICE 1