From: Paul Mundt <lethal@linux-sh.org>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] sh4: define explicitly that the target CPU is 32 bit
Date: Sat, 1 Dec 2007 10:19:06 +0900 [thread overview]
Message-ID: <20071201011906.GB15027@linux-sh.org> (raw)
In-Reply-To: <200711301715.21956.paul@codesourcery.com>
On Fri, Nov 30, 2007 at 05:15:21PM +0000, Paul Brook wrote:
> On Friday 30 November 2007, Carlo Marcelo Arenas Belon wrote:
> > On Fri, Nov 30, 2007 at 04:28:09PM +0000, Paul Brook wrote:
> > in the sh4 specific case, it doesn't make sense for sh4 to print an access
> > error to a physical address that is 64 bit long when it is a 32 bit CPU and
> > that is what would happen unless the patch is applied.
> >
> > if anything the following definition from cpu-defs.h is invalid for a
> > representation of a 32 bit physical address :
> >
> > #define TARGET_FMT_plx "%016" PRIx64
>
> Before you can fix that you probably need to fix the bits of qemu (TLB code)
> that store a host pointer in a phys_addr_t. Or at least distance
> TARGET_PHYS_ADDR_BITS from the definition of phys_addr_t, and include
> appropriate comments.
>
> In that case TARGET_PHYS_ADDR_BITS could be a precise value, rather than the
> next multiple of 32. e.g. I think sparc32 has a 40-bit physical address
> space.
>
It also depends on how precise you want to make this. SH has configurable
29-bit and 32-bit physical, while MIPS and PPC both have 32 and 36-bit
physical implementations. Setting things to an arbitrary upper ceiling at
least prevents this from quickly entering ifdef hell territory.
prev parent reply other threads:[~2007-12-01 1:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-11-30 16:23 [Qemu-devel] [PATCH] sh4: define explicitly that the target CPU is 32 bit Carlo Marcelo Arenas Belon
2007-11-30 16:28 ` Paul Brook
2007-11-30 17:00 ` Carlo Marcelo Arenas Belon
2007-11-30 17:15 ` Paul Brook
2007-11-30 17:24 ` Blue Swirl
2007-12-01 1:19 ` Paul Mundt [this message]
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