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Date: Thu, 13 Dec 2007 08:28:42 -0500
From: Daniel Jacobowitz <drow@false.org>
Subject: Re: [Qemu-devel] [PATCH] arm eabi TLS
Message-ID: <20071213132842.GA25184@caradoc.them.org>
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To: qemu-devel@nongnu.org

On Thu, Dec 13, 2007 at 01:21:03AM +0000, Paul Brook wrote:
> I disagree. The TLS register is part of the CPU state. On many machines 
> (including ARMv6 CPUs) it's an actual CPU register. I'm fairly sure the same 
> is true for recent MIPS revisions.

That's correct, though I don't know if there is silicon to match yet.

-- 
Daniel Jacobowitz
CodeSourcery