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From: Rusty Russell <rusty@rustcorp.com.au>
Subject: Re: [Qemu-devel] Re: [PATCH 2/3] virtio network device
Date: Tue, 18 Dec 2007 13:31:51 +1100
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To: Anthony Liguori <anthony@codemonkey.ws>
Cc: Anthony Liguori <aliguori@us.ibm.com>, qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>

On Wednesday 12 December 2007 12:40:43 Anthony Liguori wrote:
> Rusty Russell wrote:
> > On Sunday 09 December 2007 09:02:48 Anthony Liguori wrote:
> >> If QEMU ever got true SMP support, then virtio would not work as it
> >> requires 16-bit atomic writes which AFAIK is not possible on a number of
> >> non-x86 architectures.
> >
> > Hmm?  Where is this requirement coming from?
> >
> > I think everyone should stop using the word "atomic" in virtio
> > discussions; it's confusing.
>
> The virtio ring queue indices are 16-bit and are readable to one end
> while writable on the other end.  To ensure that this can be done in a
> lock-less way, it's necessary to atomically update the index.  Atomic is
> the right word here because if the 16-bit write gets converted into two
> 8-bit writes, then very bad things could happen with SMP.

Of course, but that's insane.  Your assertion that it's not possible on a 
number of non-x86 architectures is what I'm questioning here.  You're 
confusing the inability of architectures to atomically *modify* a 16 bit 
value and our requirement, where even if you found an architecture which 
couldn't do 16 bit writes, you can do it as a 32 bit write.

Hope that clarifies,
Rusty.