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Date: Thu, 17 Jan 2008 13:18:18 +0000
From: Thiemo Seufer <ths@networkno.de>
Subject: Re: [Qemu-devel] [PATCH 1/5] Fix i386 Host
Message-ID: <20080117131818.GD9767@networkno.de>
References: <478EF8DE.2050103@csgraf.de> <478F0D5F.2000204@csgraf.de>
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To: Alexander Graf <alex@csgraf.de>
Cc: qemu-devel@nongnu.org

Alexander Graf wrote:
[snip]
> Index: qemu/target-alpha/cpu.h
> ===================================================================
> --- qemu.orig/target-alpha/cpu.h
> +++ qemu/target-alpha/cpu.h
> @@ -275,6 +275,8 @@ struct CPUAlphaState {
>       * used to emulate 64 bits target on 32 bits hosts
>       */
>      target_ulong t0, t1, t2;
> +#elif defined(GCC_BREAKS_T_REGISTER)
> +    target_ulong t2;
>  #endif
>      /* */
>      double ft0, ft1, ft2;
> Index: qemu/target-alpha/exec.h
> ===================================================================
> --- qemu.orig/target-alpha/exec.h
> +++ qemu/target-alpha/exec.h
> @@ -40,7 +40,11 @@ register struct CPUAlphaState *env asm(A
>  
>  register uint64_t T0 asm(AREG1);
>  register uint64_t T1 asm(AREG2);
> +#ifdef GCC_BREAKS_T_REGISTER
> +#define T2 (env->t2)
> +#else
>  register uint64_t T2 asm(AREG3);
> +#endif
>  
>  #endif /* TARGET_LONG_BITS > HOST_LONG_BITS */

Please make the #ifdef'ery in cpu.h look the same as in exec.h.

[snip]
> Index: qemu/target-sparc/exec.h
> ===================================================================
> --- qemu.orig/target-sparc/exec.h
> +++ qemu/target-sparc/exec.h
> @@ -32,10 +32,14 @@ register uint32_t T2 asm(AREG4);
>  
>  #else
>  #define REGWPTR env->regwptr
> +#ifdef HOST_I386
> +#define T2 (env->t2)
> +#else
>  register uint32_t T2 asm(AREG3);
> -#endif
>  #define reg_T2
>  #endif
> +#endif
> +#endif

Should also use GCC_BREAKS_T_REGISTER.


Thiemo