[Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Bernhard Kauer]

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The wrmsr_helper should allow to set the SVM flag in EFER.


	Bernhard Kauer

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Index: target-i386/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.101
diff -u -r1.101 helper.c
--- target-i386/helper.c	3 Feb 2008 03:26:30 -0000	1.101
+++ target-i386/helper.c	27 Feb 2008 16:05:33 -0000
@@ -2802,6 +2802,8 @@
                 update_mask |= MSR_EFER_FFXSR;
             if (env->cpuid_ext2_features & CPUID_EXT2_NX)
                 update_mask |= MSR_EFER_NXE;
+	    if (env->cpuid_ext3_features & CPUID_EXT3_SVM)
+	        update_mask |= MSR_EFER_SVM;
             env->efer = (env->efer & ~update_mask) |
             (val & update_mask);
         }

Re: [Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Alexander Graf]

On Feb 27, 2008, at 5:07 PM, Bernhard Kauer wrote:

> <qemu_efer.diff>

MSR_EFER_SVM is not defined in my qemu version. What does the bit  
change if set?

Re: [Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Bernhard Kauer]

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On Wed, Feb 27, 2008 at 06:03:49PM +0100, Alexander Graf wrote:
> MSR_EFER_SVM is not defined in my qemu version. What does the bit change 
> if set?

The AMD vol2 reads like this:

	Secure Virtual Machine Enable (SVME) Bit. Bit 12. Enables the SVM extensions.
	When this bit is zero, the SVM instructions cause #UD exceptions.

The bit was called MSR_EFER_SVME_MASK in svm.h before, I renamed it in the
attached patch to MSR_EFER_SVME to match the style of the other definitions
in cpu.h.

BTW, triggering the above mentioned #UD is missing in the code...


	Bernhard Kauer

[-- Attachment #2: qemu_efer.diff --]
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Index: target-i386/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.101
diff -u -r1.101 helper.c
--- target-i386/helper.c	3 Feb 2008 03:26:30 -0000	1.101
+++ target-i386/helper.c	29 Feb 2008 09:33:41 -0000
@@ -2802,6 +2802,8 @@
                 update_mask |= MSR_EFER_FFXSR;
             if (env->cpuid_ext2_features & CPUID_EXT2_NX)
                 update_mask |= MSR_EFER_NXE;
+	    if (env->cpuid_ext3_features & CPUID_EXT3_SVM)
+	        update_mask |= MSR_EFER_SVME;
             env->efer = (env->efer & ~update_mask) |
             (val & update_mask);
         }
Index: target-i386/svm.h
===================================================================
RCS file: /sources/qemu/qemu/target-i386/svm.h,v
retrieving revision 1.1
diff -u -r1.1 svm.h
--- target-i386/svm.h	23 Sep 2007 15:30:28 -0000	1.1
+++ target-i386/svm.h	29 Feb 2008 09:33:41 -0000
@@ -179,7 +179,7 @@
 #define SVM_CPUID_FEATURE_SHIFT 2
 #define SVM_CPUID_FUNC 0x8000000a
 
-#define MSR_EFER_SVME_MASK (1ULL << 12)
+#define MSR_EFER_SVME  (1ULL << 12)
 
 #define SVM_SELECTOR_S_SHIFT 4
 #define SVM_SELECTOR_DPL_SHIFT 5

Re: [Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Alexander Graf]

On Feb 29, 2008, at 10:41 AM, Bernhard Kauer wrote:

> On Wed, Feb 27, 2008 at 06:03:49PM +0100, Alexander Graf wrote:
>> MSR_EFER_SVM is not defined in my qemu version. What does the bit  
>> change
>> if set?
>
> The AMD vol2 reads like this:
>
> 	Secure Virtual Machine Enable (SVME) Bit. Bit 12. Enables the SVM  
> extensions.
> 	When this bit is zero, the SVM instructions cause #UD exceptions.
>
> The bit was called MSR_EFER_SVME_MASK in svm.h before, I renamed it  
> in the
> attached patch to MSR_EFER_SVME to match the style of the other  
> definitions
> in cpu.h.
>
> BTW, triggering the above mentioned #UD is missing in the code...

Could you please add the #UD check to the vm* helpers too? It's not  
that many and I don't see a point in implementing this half-heartedly.  
Keep in mind that updating the bit should fail within a virtual machine.

Alex

Re: [Qemu-devel] [PATCH] allow update of MSR_EFER_SVM

[Bernhard Kauer]

On Fri, Feb 29, 2008 at 11:20:24AM +0100, Alexander Graf wrote:
> Keep in mind that updating the bit should fail within a virtual machine.

I found the following sentence in the manual:

	The effect of turning off EFER.SVME while a guest is running is undefined;
	therefore, the VMM should always prevent guests from writing EFER.

Therefore i think the wrmsr-code is just fine, as it is in my patch.


	Bernhard Kauer