From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JZAuE-00080D-Pu for qemu-devel@nongnu.org; Tue, 11 Mar 2008 16:17:02 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JZAuE-0007z7-3o for qemu-devel@nongnu.org; Tue, 11 Mar 2008 16:17:02 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JZAuD-0007yy-VQ for qemu-devel@nongnu.org; Tue, 11 Mar 2008 16:17:02 -0400 Received: from mx1.redhat.com ([66.187.233.31]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JZAuD-0004EZ-JO for qemu-devel@nongnu.org; Tue, 11 Mar 2008 16:17:01 -0400 Message-Id: <20080311201418.723309170@localhost.localdomain> References: <20080311201151.959635433@localhost.localdomain> Date: Tue, 11 Mar 2008 17:12:10 -0300 From: Marcelo Tosatti Content-Disposition: inline; filename=acpi-ej0 Subject: [Qemu-devel] [patch 19/24] QEMU/KVM: handle SEJ notifications Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, kvm-devel@lists.sourceforge.net Cc: aliguori@us.ibm.com, Marcelo Tosatti Handle the _EJ0 notifications. Signed-off-by: Marcelo Tosatti Index: kvm-userspace.hotplug2/qemu/hw/acpi.c =================================================================== --- kvm-userspace.hotplug2.orig/qemu/hw/acpi.c +++ kvm-userspace.hotplug2/qemu/hw/acpi.c @@ -26,6 +26,7 @@ #ifdef USE_KVM #include "qemu-kvm.h" #endif +#include "string.h" //#define DEBUG @@ -539,6 +540,7 @@ void qemu_system_powerdown(void) #define GPE_BASE 0xafe0 #define PROC_BASE 0xaf00 #define PCI_BASE 0xae00 +#define PCI_EJ_BASE 0xae08 struct gpe_regs { uint16_t sts; /* status */ @@ -659,6 +661,23 @@ static void pcihotplug_write(void *opaqu #endif } +static uint32_t pciej_read(void *opaque, uint32_t addr) +{ +#if defined(DEBUG) + printf("pciej read %lx == %lx\n", addr, val); +#endif + return 0; +} + +static void pciej_write(void *opaque, uint32_t addr, uint32_t val) +{ + int slot = ffs(val) - 1; + +#if defined(DEBUG) + printf("pciej write %lx <== %d\n", addr, val); +#endif +} + static char *model; @@ -673,6 +692,9 @@ void qemu_system_hot_add_init(char *cpu_ register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, &pci0_status); register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, &pci0_status); + register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, NULL); + register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, NULL); + model = cpu_model; } --