From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JrXUv-0002De-02 for qemu-devel@nongnu.org; Thu, 01 May 2008 08:02:49 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JrXUt-0002AW-5R for qemu-devel@nongnu.org; Thu, 01 May 2008 08:02:48 -0400 Received: from [199.232.76.173] (port=58643 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JrXUt-0002AK-0n for qemu-devel@nongnu.org; Thu, 01 May 2008 08:02:47 -0400 Received: from os.inf.tu-dresden.de ([141.76.48.99]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JrXUs-0004fK-RG for qemu-devel@nongnu.org; Thu, 01 May 2008 08:02:47 -0400 Received: from erwin.inf.tu-dresden.de ([141.76.48.80] helo=os.inf.tu-dresden.de) by os.inf.tu-dresden.de with esmtps (TLSv1:AES128-SHA:128) (Exim 4.69) id 1JrXUq-00010f-3J for qemu-devel@nongnu.org; Thu, 01 May 2008 14:02:45 +0200 Date: Thu, 1 May 2008 14:02:41 +0200 From: Adam Lackorzynski Subject: Re: [Qemu-devel] Crash due to invalid env->current_tb Message-ID: <20080501120241.GC13241@os.inf.tu-dresden.de> References: <20080429115614.GA15524@os.inf.tu-dresden.de> <20080429184011.GK17356@os.inf.tu-dresden.de> <20080430151132.GB6712@os.inf.tu-dresden.de> <20080430152102.GC6712@os.inf.tu-dresden.de> <67C63B39-3EBE-4E1F-B46B-D2FE7AAC001F@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Wed Apr 30, 2008 at 21:21:40 +0300, Blue Swirl wrote: > The attached version survives quick tests for both Sparc32 and Sparc64. Ok, I did not check for 64bit targets. So what about the following, works for me for arm, x86-32 and x86-64. Index: cpu-exec.c =================================================================== --- cpu-exec.c (revision 4276) +++ cpu-exec.c (working copy) @@ -690,7 +691,22 @@ fp.ip = tc_ptr; fp.gp = code_gen_buffer + 2 * (1 << 20); (*(void (*)(void)) &fp)(); +#elif defined(__i386) +#if (TARGET_LONG_BITS == 32) +#define CLOBBER ,"edx" #else +#define CLOBBER ,"ebx" +#endif + asm volatile ("push %%ebp\n" + "call *%1\n" + "pop %%ebp\n" + : "=A" (T0) + : "a" (gen_func) + : "ecx", "esi", "edi", "cc" CLOBBER + ); + T0 &= 0xffffffff; +#undef CLOBBER +#else T0 = gen_func(); #endif env->current_tb = NULL; For 64bit target T0 is 64bits so "=a" does not work and "=A" is needed. The strange thing is that I need to throw away the upper 32bits because otherwise it won't work. gen_func is defined to return just long but T0 is unsigned long long, this seems inconsistent. The 'and' does not appear in 32bit targets so it does not harm there. Adam -- Adam adam@os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/