* [Qemu-devel] Incoherency between the tlb and the tb_jmp_cache
@ 2008-05-05 16:26 Edgar E. Iglesias
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From: Edgar E. Iglesias @ 2008-05-05 16:26 UTC (permalink / raw)
To: qemu-devel
I'm seeing occational segfaults on my guest CRIS linux due to what I beleieve to be incoherency between the tlb and the tb_jmp_cache.
This patch seems to solve the issue. Does the patch make sense or am I missing something?
Best regards
--
Edgar E. Iglesias
Axis Communications AB
commit 6b79550cc79e23169274236daaa8a765de0ed27f
Author: Edgar E. Iglesias <edgar.iglesias@axis.com>
Date: Mon May 5 18:02:36 2008 +0200
Break out tb jmp cache flushing into a separate inline function.
Make sure to flush the jmp cache when we replace tlb entries.
diff --git a/exec.c b/exec.c
index eb3c8ab..59bca69 100644
--- a/exec.c
+++ b/exec.c
@@ -1366,6 +1366,21 @@ CPUState *cpu_copy(CPUState *env)
#if !defined(CONFIG_USER_ONLY)
+static inline void tlb_flush_jmp_cache(CPUState *env, target_ulong addr)
+{
+ unsigned int i;
+
+ /* Discard jump cache entries for any tb which might potentially
+ overlap the flushed page. */
+ i = tb_jmp_cache_hash_page(addr - TARGET_PAGE_SIZE);
+ memset (&env->tb_jmp_cache[i], 0,
+ TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
+
+ i = tb_jmp_cache_hash_page(addr);
+ memset (&env->tb_jmp_cache[i], 0,
+ TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
+}
+
/* NOTE: if flush_global is true, also flush global entries (not
implemented yet) */
void tlb_flush(CPUState *env, int flush_global)
@@ -1428,7 +1443,6 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
void tlb_flush_page(CPUState *env, target_ulong addr)
{
int i;
- TranslationBlock *tb;
#if defined(DEBUG_TLB)
printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);
@@ -1448,13 +1462,7 @@ void tlb_flush_page(CPUState *env, target_ulong addr)
#endif
#endif
- /* Discard jump cache entries for any tb which might potentially
- overlap the flushed page. */
- i = tb_jmp_cache_hash_page(addr - TARGET_PAGE_SIZE);
- memset (&env->tb_jmp_cache[i], 0, TB_JMP_PAGE_SIZE * sizeof(tb));
-
- i = tb_jmp_cache_hash_page(addr);
- memset (&env->tb_jmp_cache[i], 0, TB_JMP_PAGE_SIZE * sizeof(tb));
+ tlb_flush_jmp_cache(env, addr);
#if !defined(CONFIG_SOFTMMU)
if (addr < MMAP_AREA_END)
@@ -1706,6 +1714,10 @@ int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
} else {
te->addr_read = -1;
}
+
+ if (te->addr_code != -1) {
+ tlb_flush_jmp_cache(env, te->addr_code);
+ }
if (prot & PAGE_EXEC) {
te->addr_code = address;
} else {
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