From: "M. Warner Losh" <imp@bsdimp.com>
To: qemu-devel@nongnu.org, paul@codesourcery.com
Cc: octane@alinto.com
Subject: Re: [Qemu-devel] Support For Octeon/Cavium CPU (MIPS system)
Date: Thu, 22 May 2008 09:55:42 -0600 (MDT) [thread overview]
Message-ID: <20080522.095542.-1350511548.imp@bsdimp.com> (raw)
In-Reply-To: <200805221427.26860.paul@codesourcery.com>
In message: <200805221427.26860.paul@codesourcery.com>
Paul Brook <paul@codesourcery.com> writes:
: > I own a cavium/octeon board. I run a linux on it.
: >
: > I want to usr qemu for convenience in order to continue my developpements.
: >
: > I know that Cavium/octeon board are MIPS CPU.
:
: Not really. They're MIPS with extra weirdness.
All SoCs are MIPS with extra documented weirdness. The OCTEON CPUs
aren't documented in a public...
: Your kernel needs to match the exact CPU and board that you're
: emulating. i.e. if you want to use an unmodified kernel you need to
: add support for both the CPU and board to qemu.
This is true. fortunately, many other SoCs have had their support
added to QEMU...
Warner
next prev parent reply other threads:[~2008-05-22 15:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-22 10:48 [Qemu-devel] Support For Octeon/Cavium CPU (MIPS system) octane indice
2008-05-22 13:27 ` Paul Brook
2008-05-22 15:55 ` M. Warner Losh [this message]
2008-05-22 16:03 ` Paul Brook
2008-05-22 16:17 ` M. Warner Losh
2008-05-22 16:52 ` Thiemo Seufer
2008-05-22 22:04 ` Jamie Lokier
2008-05-22 15:47 ` M. Warner Losh
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