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Date: Thu, 22 May 2008 09:55:42 -0600 (MDT)
Message-Id: <20080522.095542.-1350511548.imp@bsdimp.com>
Subject: Re: [Qemu-devel] Support For Octeon/Cavium CPU (MIPS system)
From: "M. Warner Losh" <imp@bsdimp.com>
In-Reply-To: <200805221427.26860.paul@codesourcery.com>
References: <1211453314.48354f82621a1@webmail.alinto.com>
	<200805221427.26860.paul@codesourcery.com>
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To: qemu-devel@nongnu.org, paul@codesourcery.com
Cc: octane@alinto.com

In message: <200805221427.26860.paul@codesourcery.com>
            Paul Brook <paul@codesourcery.com> writes:
: > I own a cavium/octeon board. I run a linux on it.
: >
: > I want to usr qemu for convenience in order to continue my developpements.
: >
: > I know that Cavium/octeon board are MIPS CPU.
: 
: Not really. They're MIPS with extra weirdness.

All SoCs are MIPS with extra documented weirdness.  The OCTEON CPUs
aren't documented in a public...

: Your kernel needs to match the exact CPU and board that you're
: emulating. i.e.  if you want to use an unmodified kernel you need to
: add support for both the CPU and board to qemu.

This is true.  fortunately, many other SoCs have had their support
added to QEMU...

Warner