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From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Threading Qemu
Date: Wed, 28 May 2008 14:31:38 +0100	[thread overview]
Message-ID: <200805281431.39574.paul@codesourcery.com> (raw)
In-Reply-To: <20080528122850.GC19738@shareable.org>

> > plus you will need to take care for memory barriers, and many more things
> > (it looks very complex)
>
> Don't forget _implied_ memory write barrier after every write op on
> x86 target.  With x86 target on hosts where writes are not
> processor-ordered like x86, you need to put a write-write barrier after
> every write - except when you can prove it's not needed.  But that's
> really hard.

Yup. I had a proof of concept implementation that used the TLB to enforce 
per-page exclusive access. This worked, but the locking overhead to achieve 
this was fairly horrible, particularly when you have pages that bounce 
between CPUs frequently (e.g. kernel locks). The nice thing about this is 
that you don't need to do anything special to ensure atomicity, it just 
works.

> Both atomiciy and ordering don't have to be solved if instead you use
> "software scheduled" threads on any architecture - e.g. see GNU Pth.
> Then you won't get real parallelism on a multiprocessor host, but you
> can simulate any multiprocessor target correctly.

That's what qemu currently does.

Paul

  reply	other threads:[~2008-05-28 13:31 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-05-28  6:31 [Qemu-devel] Threading Qemu mixado
2008-05-28  7:40 ` Izik Eidus
2008-05-28 12:27   ` Fabrice Bellard
2008-05-28 12:39     ` Jamie Lokier
2008-05-28 12:28   ` Jamie Lokier
2008-05-28 13:31     ` Paul Brook [this message]
  -- strict thread matches above, loose matches on Subject: below --
2008-05-28 10:40 Mikael Regnell

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