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From: "Edgar E. Iglesias" <edgar.iglesias@axis.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RESEND][PATCH] save/restore interrupt_request across snapshots
Date: Wed, 2 Jul 2008 00:17:48 +0200	[thread overview]
Message-ID: <20080701221748.GA25206@edgar.se.axis.com> (raw)
In-Reply-To: <486A598C.2000005@siemens.com>

On Tue, Jul 01, 2008 at 06:21:32PM +0200, Jan Kiszka wrote:
> [ Rebased to latest SVN ]
> 
> Save interrupt_request state along with the cpu snapshot and restore it
> properly. This also solves the bug that pending interrupts before
> invocation of qemu_loadvm_state can tunnel into the resumed guest,
> causing invalid IRQs there.
> 
> Implementation covers ARM, CRIS, x86, and SPARC, ie. those archs that
> support snapshotting so far.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  target-arm/cpu.h       |    2 +-
>  target-arm/machine.c   |   10 +++++++++-
>  target-cris/cpu.h      |    2 +-
>  target-cris/machine.c  |   11 +++++++++++



CRIS part look fine.

Best regards,
E



>  target-i386/cpu.h      |    2 +-
>  target-i386/machine.c  |    9 ++++++++-
>  target-sparc/cpu.h     |    2 +-
>  target-sparc/machine.c |    9 ++++++++-
>  8 files changed, 40 insertions(+), 7 deletions(-)
> 
> Index: b/target-i386/machine.c
> ===================================================================
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -135,6 +135,8 @@ void cpu_save(QEMUFile *f, void *opaque)
>      qemu_put_be16s(f, &env->intercept_dr_write);
>      qemu_put_be32s(f, &env->intercept_exceptions);
>      qemu_put_8s(f, &env->v_tpr);
> +
> +    qemu_put_be32s(f, (uint32_t *)&env->interrupt_request);
>  }
>  
>  #ifdef USE_X86LDOUBLE
> @@ -169,7 +171,7 @@ int cpu_load(QEMUFile *f, void *opaque,
>      uint16_t fpus, fpuc, fptag, fpregs_format;
>      int32_t a20_mask;
>  
> -    if (version_id != 3 && version_id != 4 && version_id != 5)
> +    if (version_id < 3 || version_id > CPU_SAVE_VERSION)
>          return -EINVAL;
>      for(i = 0; i < CPU_NB_REGS; i++)
>          qemu_get_betls(f, &env->regs[i]);
> @@ -292,6 +294,11 @@ int cpu_load(QEMUFile *f, void *opaque,
>          qemu_get_be32s(f, &env->intercept_exceptions);
>          qemu_get_8s(f, &env->v_tpr);
>      }
> +    if (version_id >= 6) {
> +        qemu_get_be32s(f, (uint32_t *)&env->interrupt_request);
> +    } else {
> +        env->interrupt_request = 0;
> +    }
>      /* XXX: ensure compatiblity for halted bit ? */
>      /* XXX: compute redundant hflags bits */
>      env->hflags = hflags;
> Index: b/target-arm/cpu.h
> ===================================================================
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -397,7 +397,7 @@ void cpu_arm_set_cp_io(CPUARMState *env,
>  #define cpu_signal_handler cpu_arm_signal_handler
>  #define cpu_list arm_cpu_list
>  
> -#define CPU_SAVE_VERSION 1
> +#define CPU_SAVE_VERSION 2
>  
>  /* MMU modes definitions */
>  #define MMU_MODE0_SUFFIX _kernel
> Index: b/target-arm/machine.c
> ===================================================================
> --- a/target-arm/machine.c
> +++ b/target-arm/machine.c
> @@ -113,6 +113,8 @@ void cpu_save(QEMUFile *f, void *opaque)
>          qemu_put_be32(f, env->v7m.current_sp);
>          qemu_put_be32(f, env->v7m.exception);
>      }
> +
> +    qemu_put_be32s(f, (uint32_t *)&env->interrupt_request);
>  }
>  
>  int cpu_load(QEMUFile *f, void *opaque, int version_id)
> @@ -120,7 +122,7 @@ int cpu_load(QEMUFile *f, void *opaque,
>      CPUARMState *env = (CPUARMState *)opaque;
>      int i;
>  
> -    if (version_id != CPU_SAVE_VERSION)
> +    if (version_id < 1 || version_id > CPU_SAVE_VERSION)
>          return -EINVAL;
>  
>      for (i = 0; i < 16; i++) {
> @@ -209,6 +211,12 @@ int cpu_load(QEMUFile *f, void *opaque,
>          env->v7m.exception = qemu_get_be32(f);
>      }
>  
> +    if (version_id >= 2) {
> +        qemu_get_be32s(f, (uint32_t *)&env->interrupt_request);
> +    } else {
> +        env->interrupt_request = 0;
> +    }
> +
>      return 0;
>  }
>  
> Index: b/target-cris/machine.c
> ===================================================================
> --- a/target-cris/machine.c
> +++ b/target-cris/machine.c
> @@ -47,6 +47,8 @@ void cpu_save(QEMUFile *f, void *opaque)
>              }
>          }
>      }
> +
> +    qemu_put_be32s(f, (uint32_t *)&env->interrupt_request);
>  }
>  
>  int cpu_load(QEMUFile *f, void *opaque, int version_id)
> @@ -56,6 +58,9 @@ int cpu_load(QEMUFile *f, void *opaque,
>      int s;
>      int mmu;
>  
> +    if (version_id < 1 || version_id > CPU_SAVE_VERSION)
> +        return -EINVAL;
> +
>      for (i = 0; i < 16; i++)
>          env->regs[i] = qemu_get_be32(f);
>      for (i = 0; i < 16; i++)
> @@ -91,5 +96,11 @@ int cpu_load(QEMUFile *f, void *opaque,
>          }
>      }
>  
> +    if (version_id >= 2) {
> +        qemu_get_be32s(f, (uint32_t *)&env->interrupt_request);
> +    } else {
> +        env->interrupt_request = 0;
> +    }
> +
>      return 0;
>  }
> Index: b/target-sparc/machine.c
> ===================================================================
> --- a/target-sparc/machine.c
> +++ b/target-sparc/machine.c
> @@ -58,6 +58,8 @@ void cpu_save(QEMUFile *f, void *opaque)
>      for(i = 0; i < 16; i++)
>          qemu_put_be32s(f, &env->mmuregs[i]);
>  #endif
> +
> +    qemu_put_be32s(f, (uint32_t *)&env->interrupt_request);
>  }
>  
>  int cpu_load(QEMUFile *f, void *opaque, int version_id)
> @@ -66,7 +68,7 @@ int cpu_load(QEMUFile *f, void *opaque,
>      int i;
>      uint32_t tmp;
>  
> -    if (version_id != 4)
> +    if (version_id < 4 || version_id > CPU_SAVE_VERSION)
>          return -EINVAL;
>      for(i = 0; i < 8; i++)
>          qemu_get_betls(f, &env->gregs[i]);
> @@ -99,6 +101,11 @@ int cpu_load(QEMUFile *f, void *opaque,
>      for(i = 0; i < 16; i++)
>          qemu_get_be32s(f, &env->mmuregs[i]);
>  #endif
> +    if (version_id >= 5) {
> +        qemu_get_be32s(f, (uint32_t *)&env->interrupt_request);
> +    } else {
> +        env->interrupt_request = 0;
> +    }
>      tlb_flush(env, 1);
>      return 0;
>  }
> Index: b/target-cris/cpu.h
> ===================================================================
> --- a/target-cris/cpu.h
> +++ b/target-cris/cpu.h
> @@ -210,7 +210,7 @@ enum {
>  #define cpu_gen_code cpu_cris_gen_code
>  #define cpu_signal_handler cpu_cris_signal_handler
>  
> -#define CPU_SAVE_VERSION 1
> +#define CPU_SAVE_VERSION 2
>  
>  /* MMU modes definitions */
>  #define MMU_MODE0_SUFFIX _kernel
> Index: b/target-i386/cpu.h
> ===================================================================
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -726,7 +726,7 @@ static inline int cpu_get_time_fast(void
>  #define cpu_signal_handler cpu_x86_signal_handler
>  #define cpu_list x86_cpu_list
>  
> -#define CPU_SAVE_VERSION 5
> +#define CPU_SAVE_VERSION 6
>  
>  /* MMU modes definitions */
>  #define MMU_MODE0_SUFFIX _kernel
> Index: b/target-sparc/cpu.h
> ===================================================================
> --- a/target-sparc/cpu.h
> +++ b/target-sparc/cpu.h
> @@ -388,7 +388,7 @@ void cpu_check_irqs(CPUSPARCState *env);
>  #define cpu_signal_handler cpu_sparc_signal_handler
>  #define cpu_list sparc_cpu_list
>  
> -#define CPU_SAVE_VERSION 4
> +#define CPU_SAVE_VERSION 5
>  
>  /* MMU modes definitions */
>  #define MMU_MODE0_SUFFIX _user
> 
> 

-- 
Edgar E. Iglesias
Axis Communications AB

      parent reply	other threads:[~2008-07-01 22:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-06-18 11:41 [Qemu-devel] [PATCH] save/restore interrupt_request across snapshots Jan Kiszka
2008-07-01 16:21 ` [Qemu-devel] [RESEND][PATCH] " Jan Kiszka
2008-07-01 20:02   ` Paul Brook
2008-07-01 21:47     ` [Qemu-devel] " Jan Kiszka
2008-07-01 21:55       ` Paul Brook
2008-07-01 22:17   ` Edgar E. Iglesias [this message]

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