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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/2] De-assert PIC IRQs properly at APIC level
Date: Thu, 21 Aug 2008 05:15:28 +0200	[thread overview]
Message-ID: <20080821031528.GI3371@volta.aurel32.net> (raw)
In-Reply-To: <48AC353A.3030109@siemens.com>

On Wed, Aug 20, 2008 at 05:16:10PM +0200, Jan Kiszka wrote:
> [ Taking latest isapc changes into account. ]
 
Applied, thanks.

> Ensure that PIC-delivered IRQs are properly de-asserted in case the APIC
> is in EXTINT or FIXED mode (with level-triggering selected) on LINT0.
> Fixes EFI-BIOS boot issues.
> 
> This patch also cleans up a bit the interface between PIC and APIC,
> making apic_local_deliver private again.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  hw/apic.c |   23 ++++++++++++++++++++++-
>  hw/pc.c   |    4 +---
>  hw/pc.h   |    4 +---
>  3 files changed, 24 insertions(+), 7 deletions(-)
> 
> Index: b/hw/apic.c
> ===================================================================
> --- a/hw/apic.c
> +++ b/hw/apic.c
> @@ -166,7 +166,7 @@ static inline void reset_bit(uint32_t *t
>      tab[i] &= ~mask;
>  }
>  
> -void apic_local_deliver(CPUState *env, int vector)
> +static void apic_local_deliver(CPUState *env, int vector)
>  {
>      APICState *s = env->apic_state;
>      uint32_t lvt = s->lvt[vector];
> @@ -197,6 +197,27 @@ void apic_local_deliver(CPUState *env, i
>      }
>  }
>  
> +void apic_deliver_pic_intr(CPUState *env, int level)
> +{
> +    if (level)
> +        apic_local_deliver(env, APIC_LVT_LINT0);
> +    else {
> +        APICState *s = env->apic_state;
> +        uint32_t lvt = s->lvt[APIC_LVT_LINT0];
> +
> +        switch ((lvt >> 8) & 7) {
> +        case APIC_DM_FIXED:
> +            if (!(lvt & APIC_LVT_LEVEL_TRIGGER))
> +                break;
> +            reset_bit(s->irr, lvt & 0xff);
> +            /* fall through */
> +        case APIC_DM_EXTINT:
> +            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
> +            break;
> +        }
> +    }
> +}
> +
>  #define foreach_apic(apic, deliver_bitmask, code) \
>  {\
>      int __i, __j, __mask;\
> Index: b/hw/pc.c
> ===================================================================
> --- a/hw/pc.c
> +++ b/hw/pc.c
> @@ -119,11 +119,9 @@ static void pic_irq_request(void *opaque
>      CPUState *env = first_cpu;
>  
>      if (env->apic_state) {
> -        if (!level)
> -            return;
>          while (env) {
>              if (apic_accept_pic_intr(env))
> -                apic_local_deliver(env, APIC_LINT0);
> +                apic_deliver_pic_intr(env, level);
>              env = env->next_cpu;
>          }
>      } else {
> Index: b/hw/pc.h
> ===================================================================
> --- a/hw/pc.h
> +++ b/hw/pc.h
> @@ -40,11 +40,9 @@ void irq_info(void);
>  /* APIC */
>  typedef struct IOAPICState IOAPICState;
>  
> -#define APIC_LINT0	3
> -
>  int apic_init(CPUState *env);
>  int apic_accept_pic_intr(CPUState *env);
> -void apic_local_deliver(CPUState *env, int vector);
> +void apic_deliver_pic_intr(CPUState *env, int level);
>  int apic_get_interrupt(CPUState *env);
>  IOAPICState *ioapic_init(void);
>  void ioapic_set_irq(void *opaque, int vector, int level);
> 
> 
> 

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

      reply	other threads:[~2008-08-21  3:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-08-18 15:43 [Qemu-devel] [RESEND][PATCH] De-assert PIC IRQs properly at APIC level Jan Kiszka
2008-08-20 15:16 ` [Qemu-devel] [PATCH 1/2] De-assert ISA PIC IRQs properly Jan Kiszka
2008-08-21  3:15   ` Aurelien Jarno
2008-08-20 15:16 ` [Qemu-devel] [PATCH 2/2] De-assert PIC IRQs properly at APIC level Jan Kiszka
2008-08-21  3:15   ` Aurelien Jarno [this message]

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