From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KWHH1-0007eQ-04 for qemu-devel@nongnu.org; Thu, 21 Aug 2008 17:00:51 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KWHGz-0007e0-2a for qemu-devel@nongnu.org; Thu, 21 Aug 2008 17:00:50 -0400 Received: from [199.232.76.173] (port=41680 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KWHGy-0007dx-UN for qemu-devel@nongnu.org; Thu, 21 Aug 2008 17:00:48 -0400 Received: from il.qumranet.com ([212.179.150.194]:40489) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KWHGx-0006zn-NN for qemu-devel@nongnu.org; Thu, 21 Aug 2008 17:00:48 -0400 Date: Fri, 22 Aug 2008 00:00:46 +0300 From: Gleb Natapov Subject: Re: [Qemu-devel] [PATCH] Ignore IDE command if issued while IDE is busy. Message-ID: <20080821210046.GA1999@minantech.com> References: <20080818102240.30186.32779.stgit@gleb-debian.qumranet.com.qumranet.com> <48ADC629.90703@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <48ADC629.90703@codemonkey.ws> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org On Thu, Aug 21, 2008 at 02:46:49PM -0500, Anthony Liguori wrote: >> @@ -2539,6 +2561,10 @@ static uint32_t ide_data_readl(void *opaque, uint32_t addr) >> uint8_t *p; >> int ret; >> + /* PIO data access allowed only when DRQ bit is set */ >> + if (!(s->status & DRQ_STAT)) >> + return; >> > > This function returns a uint32_t but you just have a return; here. > Well, the behavior is undefined, so why not return garbage? ;) --- Ignore IDE command if issued while IDE is busy. Feature, Sector Count, LBA Low/Mid/High and Device registers should be written only when both BSY and DRQ are cleared to zero. Command register shall only be written when BSY and DRQ are set to zero for all commands except DEVICE RESET. Data Port register shall be accessed for host PIO data transfer only when DRQ is set to one. Signed-off-by: Gleb Natapov diff --git a/hw/ide.c b/hw/ide.c index 6b14e8f..1e60591 100644 --- a/hw/ide.c +++ b/hw/ide.c @@ -1981,6 +1981,11 @@ static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) #endif addr &= 7; + + /* ignore writes to command block while busy with previous command */ + if (addr != 7 && (ide_if->cur_drive->status & (BUSY_STAT|DRQ_STAT))) + return; + switch(addr) { case 0: break; @@ -2040,6 +2045,10 @@ static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) if (s != ide_if && !s->bs) break; + /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */ + if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET) + break; + switch(val) { case WIN_IDENTIFY: if (s->bs && !s->is_cdrom) { @@ -2498,6 +2507,10 @@ static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val) IDEState *s = ((IDEState *)opaque)->cur_drive; uint8_t *p; + /* PIO data access allowed only when DRQ bit is set */ + if (!(s->status & DRQ_STAT)) + return; + p = s->data_ptr; *(uint16_t *)p = le16_to_cpu(val); p += 2; @@ -2511,6 +2524,11 @@ static uint32_t ide_data_readw(void *opaque, uint32_t addr) IDEState *s = ((IDEState *)opaque)->cur_drive; uint8_t *p; int ret; + + /* PIO data access allowed only when DRQ bit is set */ + if (!(s->status & DRQ_STAT)) + return 0; + p = s->data_ptr; ret = cpu_to_le16(*(uint16_t *)p); p += 2; @@ -2525,6 +2543,10 @@ static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val) IDEState *s = ((IDEState *)opaque)->cur_drive; uint8_t *p; + /* PIO data access allowed only when DRQ bit is set */ + if (!(s->status & DRQ_STAT)) + return; + p = s->data_ptr; *(uint32_t *)p = le32_to_cpu(val); p += 4; @@ -2539,6 +2561,10 @@ static uint32_t ide_data_readl(void *opaque, uint32_t addr) uint8_t *p; int ret; + /* PIO data access allowed only when DRQ bit is set */ + if (!(s->status & DRQ_STAT)) + return 0; + p = s->data_ptr; ret = cpu_to_le32(*(uint32_t *)p); p += 4; -- Gleb.