From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KaIT2-00055G-KL for qemu-devel@nongnu.org; Mon, 01 Sep 2008 19:05:52 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KaIT1-00054D-Sa for qemu-devel@nongnu.org; Mon, 01 Sep 2008 19:05:52 -0400 Received: from [199.232.76.173] (port=33875 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KaIT1-00053m-Ev for qemu-devel@nongnu.org; Mon, 01 Sep 2008 19:05:51 -0400 Received: from csl.cornell.edu ([128.84.224.10]:2651 helo=vlsi.csl.cornell.edu) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KaIT0-0003Kh-Sl for qemu-devel@nongnu.org; Mon, 01 Sep 2008 19:05:51 -0400 Received: from stanley.csl.cornell.edu (stanley.csl.cornell.edu [128.84.224.15]) by vlsi.csl.cornell.edu (8.13.4/8.13.4) with ESMTP id m81N5jQX017900 for ; Mon, 1 Sep 2008 19:05:50 -0400 (EDT) Date: Mon, 1 Sep 2008 19:05:45 -0400 (EDT) From: Vince Weaver Subject: Re: [Qemu-devel] [5123] Fix y register loads and stores In-Reply-To: <20080901182340.H84348@stanley.csl.cornell.edu> Message-ID: <20080901190455.M84611@stanley.csl.cornell.edu> References: <20080901173717.J84348@stanley.csl.cornell.edu> <20080901182340.H84348@stanley.csl.cornell.edu> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > So something is wrong with the sign extension. Unfortunately I won't have > time to look into this more until tomorrow, but I wanted to just get this out > there. I did have time to look at it in the end. Here's a patch that fixes my test case. I'll have to look at the sparcv9 manual closer to make sure it's the right thing to do. Vince --- ./target-sparc/translate.c.orig 2008-09-01 19:03:10.000000000 -0400 +++ ./target-sparc/translate.c 2008-09-01 19:02:54.000000000 -0400 @@ -793,8 +793,8 @@ r_temp = tcg_temp_new(TCG_TYPE_I64); r_temp2 = tcg_temp_new(TCG_TYPE_I64); - tcg_gen_ext_tl_i64(r_temp, src2); - tcg_gen_ext_tl_i64(r_temp2, src1); + tcg_gen_ext_i32_i64(r_temp, src2); + tcg_gen_ext_i32_i64(r_temp2, src1); tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); tcg_gen_shri_i64(r_temp, r_temp2, 32);