Re: [Qemu-devel] MIPS kernel hanging when loaded through U-Boot in qemu

[Thomas Petazzoni <thomas.petazzoni@enix.org>]

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Le Wed, 3 Sep 2008 14:03:37 +0200,
Thomas Petazzoni <thomas.petazzoni@enix.org> a écrit :

> > Qemu always allows to set this Cause bit, independent of the CPU
> > type. So I figure we have two bugs:
> >  - The kernel should try to clear the IV bit if it doesn't intend to
> >    use it

I tried this approach, using the following patch to the kernel, and it
now works, the kernel boots successfully !

This solves my problem of demoing U-Boot+kernel on MIPS, but it's quite
useless for others since the qemu-mips platform has been removed from
the kernel between .24 and .25. Except if the bug is present for other
platforms, in which case Qemu could probably be fixed as you suggested ?

Thanks!

Thomas

---
 arch/mips/kernel/traps.c |    3 +++
 1 file changed, 3 insertions(+)

Index: kernel.old/arch/mips/kernel/traps.c
===================================================================
--- kernel.old.orig/arch/mips/kernel/traps.c
+++ kernel.old/arch/mips/kernel/traps.c
@@ -1351,6 +1351,9 @@
 		} else
 			set_c0_cause(CAUSEF_IV);
 	}
+	else {
+		clear_c0_cause(CAUSEF_IV);
+	}
 
 	/*
 	 * Before R2 both interrupt numbers were fixed to 7, so on R2 only:

-- 
Thomas Petazzoni, thomas.petazzoni@enix.org, http://thomas.enix.org
Jabber, thomas.petazzoni@jabber.dk
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