From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KbcAX-0003P5-5i for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:20:13 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KbcAU-0003Nb-OM for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:20:12 -0400 Received: from [199.232.76.173] (port=35308 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KbcAU-0003NY-KU for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:20:10 -0400 Received: from hall.aurel32.net ([91.121.138.14]:34520) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kbc9E-0007CG-3y for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:18:52 -0400 Received: from junta-icatm144570-bada.red.retevision.es ([62.81.118.18] helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1Kbc9B-0000vG-2X for qemu-devel@nongnu.org; Fri, 05 Sep 2008 16:18:49 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.69) (envelope-from ) id 1Kbc99-0001pN-IB for qemu-devel@nongnu.org; Fri, 05 Sep 2008 16:18:47 +0200 Date: Fri, 5 Sep 2008 16:18:47 +0200 From: =?iso-8859-15?Q?Aur=E9lien?= Jarno Subject: Re: [Qemu-devel] [PATCH 9/x] ppc: Convert op_add, op_addi to TCG Message-ID: <20080905141847.GA22837@volta.aurel32.net> References: <67BC3D0E-6819-426A-BD93-ADE75621E6E4@web.de> <3D7FC18B-1027-4AB9-ACDE-E7B650F259F2@googlemail.com> <519F0BAB-FCDE-40D4-9255-48CB569909E5@googlemail.com> <20080904143931.GC11924@volta.aurel32.net> <9F25F767-0618-4970-88E0-83FD155753C4@googlemail.com> <20080904203619.GA1819@volta.aurel32.net> <3970D476-0CFB-4F89-B06C-90FD9030AF8F@googlemail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <3970D476-0CFB-4F89-B06C-90FD9030AF8F@googlemail.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Fri, Sep 05, 2008 at 12:53:56AM +0200, Andreas Färber wrote: > Replace op_add with tcg_gen_add_tl and op_addi with tcg_gen_addi_tl. > > Signed-off-by: Andreas Faerber Applied thanks, but see my comment below. > --- > target-ppc/op.c | 13 ------------- > target-ppc/translate.c | 34 +++++++++++++++++++--------------- > 2 files changed, 19 insertions(+), 28 deletions(-) > > diff --git a/target-ppc/op.c b/target-ppc/op.c > index 5451fd4..4ee411b 100644 > --- a/target-ppc/op.c > +++ b/target-ppc/op.c > @@ -602,12 +602,6 @@ void OPPROTO op_dec_ctr (void) > > /*** Integer arithmetic > ***/ > /* add */ > -void OPPROTO op_add (void) > -{ > - T0 += T1; > - RETURN(); > -} > - > void OPPROTO op_check_addo (void) > { > xer_ov = (((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & > @@ -664,13 +658,6 @@ void OPPROTO op_adde_64 (void) > } > #endif > > -/* add immediate */ > -void OPPROTO op_addi (void) > -{ > - T0 += (int32_t)PARAM1; > - RETURN(); > -} > - > /* add to minus one extended */ > void OPPROTO op_add_me (void) > { > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index d952276..f505be1 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -827,10 +827,14 @@ __GEN_INT_ARITH1_O_64(name##o, opc1, opc2, opc3 | > 0x10, type) > #endif > > /* add add. addo addo. */ > +static always_inline void gen_op_add (void) > +{ > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > +} At some point, we will have to change this kind of function, otherwise it will be really difficult to get rid of T0, T1 and T2. > static always_inline void gen_op_addo (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addo(); > } > #if defined(TARGET_PPC64) > @@ -838,7 +842,7 @@ static always_inline void gen_op_addo (void) > static always_inline void gen_op_addo_64 (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addo_64(); > } > #endif > @@ -847,13 +851,13 @@ GEN_INT_ARITH2_64 (add, 0x1F, 0x0A, 0x08, > PPC_INTEGER); > static always_inline void gen_op_addc (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addc(); > } > static always_inline void gen_op_addco (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addc(); > gen_op_check_addo(); > } > @@ -861,13 +865,13 @@ static always_inline void gen_op_addco (void) > static always_inline void gen_op_addc_64 (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addc_64(); > } > static always_inline void gen_op_addco_64 (void) > { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > gen_op_check_addc_64(); > gen_op_check_addo_64(); > } > @@ -1022,7 +1026,7 @@ GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, > PPC_INTEGER) > } else { > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) > - gen_op_addi(simm); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); > } > tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); > } > @@ -1034,7 +1038,7 @@ GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, > PPC_INTEGER) > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_addi(simm); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); > #if defined(TARGET_PPC64) > if (ctx->sf_mode) > gen_op_check_addc_64(); > @@ -1054,7 +1058,7 @@ GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, > 0x00000000, PPC_INTEGER) > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) { > tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); > - gen_op_addi(simm); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); > #if defined(TARGET_PPC64) > if (ctx->sf_mode) > gen_op_check_addc_64(); > @@ -1078,7 +1082,7 @@ GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, > PPC_INTEGER) > } else { > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) > - gen_op_addi(simm << 16); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << 16); > } > tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); > } > @@ -2118,7 +2122,7 @@ static always_inline void gen_addr_imm_index > (DisasContext *ctx, > } else { > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) > - gen_op_addi(simm); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); > } > #ifdef DEBUG_MEMORY_ACCESSES > gen_op_print_mem_EA(); > @@ -2132,7 +2136,7 @@ static always_inline void gen_addr_reg_index > (DisasContext *ctx) > } else { > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); > - gen_op_add(); > + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); > } > #ifdef DEBUG_MEMORY_ACCESSES > gen_op_print_mem_EA(); > @@ -2331,7 +2335,7 @@ GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, > PPC_64BX) > gen_addr_imm_index(ctx, 0x0F); > op_ldst(ld); > tcg_gen_mov_tl(cpu_gpr[rd], cpu_T[1]); > - gen_op_addi(8); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8); > op_ldst(ld); > tcg_gen_mov_tl(cpu_gpr[rd + 1], cpu_T[1]); > #endif > @@ -2427,7 +2431,7 @@ GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, > PPC_64B) > gen_addr_imm_index(ctx, 0x03); > tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs]); > op_ldst(std); > - gen_op_addi(8); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8); > tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs + 1]); > op_ldst(std); > #endif > @@ -5346,7 +5350,7 @@ static always_inline void gen_addr_spe_imm_index > (DisasContext *ctx, int sh) > } else { > tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); > if (likely(simm != 0)) > - gen_op_addi(simm << sh); > + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << sh); > } > } > > -- > 1.5.5.1 > -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net