[Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Gleb Natapov]

Hi,

Here the latest version of the patch series.

This patch series implements simple key/value base communication channel
to pass firmware configuration from qemu to guest firmware in patch 1.
Patches 2-5 implement UUID support. Patch 6 implements CPU speed detection
needed by SMBIOS. Patch 7 adds more common keys that may be used by
various firmwares. Patch 8 add sparc specific keys.

---

Blue Swirl (2):
      Add sparc keys to firmware configuration.
      Add common keys to firmware configuration

Gleb Natapov (6):
      Pass cpu speed into SM BIOS.
      Add UUID to firmware configuration info.
      Use libuuid if available.
      Add "info uuid" command to monitor.
      Add -uuid command line option.
      Key/value based qemu<->guest firmware communication mechanism.


 Makefile.target |    5 +
 configure       |   21 ++++
 hw/fw_cfg.c     |  295 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/fw_cfg.h     |   33 ++++++
 hw/pc.c         |   96 ++++++++++++++++++
 hw/sun4m.c      |   93 ++++++++++++++---
 hw/sun4u.c      |   15 +++
 monitor.c       |   11 ++
 sysemu.h        |    2 
 vl.c            |   48 +++++++++
 10 files changed, 600 insertions(+), 19 deletions(-)
 create mode 100644 hw/fw_cfg.c
 create mode 100644 hw/fw_cfg.h

-- 
        Gleb.

[Qemu-devel] [PATCH v6 1/8] Key/value based qemu<->guest firmware communication mechanism.

[Gleb Natapov]

Generic way to pass configuration info between qemu process and guest firmware.

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 Makefile.target |    1 
 hw/fw_cfg.c     |  289 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/fw_cfg.h     |   28 +++++
 hw/pc.c         |    7 +
 hw/sun4m.c      |   14 +++
 hw/sun4u.c      |    5 +
 6 files changed, 344 insertions(+), 0 deletions(-)
 create mode 100644 hw/fw_cfg.c
 create mode 100644 hw/fw_cfg.h

diff --git a/Makefile.target b/Makefile.target
index dd511ef..e3bceac 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -473,6 +473,7 @@ endif #CONFIG_DARWIN_USER
 ifndef CONFIG_USER_ONLY
 
 OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o machine.o net-checksum.o
+OBJS+=fw_cfg.o
 ifdef CONFIG_WIN32
 OBJS+=block-raw-win32.o
 else
diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
new file mode 100644
index 0000000..db5f0bd
--- /dev/null
+++ b/hw/fw_cfg.c
@@ -0,0 +1,289 @@
+/*
+ * QEMU Firmware configuration device emulation
+ *
+ * Copyright (c) 2008 Gleb Natapov
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+#include "isa.h"
+#include "fw_cfg.h"
+
+/* debug firmware config */
+//#define DEBUG_FW_CFG
+
+#ifdef DEBUG_FW_CFG
+#define FW_CFG_DPRINTF(fmt, args...)                     \
+    do { printf("FW_CFG: " fmt , ##args); } while (0)
+#else
+#define FW_CFG_DPRINTF(fmt, args...)
+#endif
+
+#define FW_CFG_SIZE 2
+
+typedef struct _FWCfgEntry {
+    uint16_t len;
+    uint8_t *data;
+    void *callback_opaque;
+    FWCfgCallback callback;
+} FWCfgEntry;
+
+typedef struct _FWCfgState {
+    FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
+    uint16_t cur_entry;
+    uint16_t cur_offset;
+} FWCfgState;
+
+static void fw_cfg_write(FWCfgState *s, uint8_t value)
+{
+    int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
+    FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
+
+    FW_CFG_DPRINTF("write %d\n", value);
+
+    if (s->cur_entry & FW_CFG_WRITE_CHANNEL && s->cur_offset < e->len) {
+        e->data[s->cur_offset++] = value;
+        if (s->cur_offset == e->len) {
+            e->callback(e->callback_opaque, e->data);
+            s->cur_offset = 0;
+        }
+    }
+}
+
+static int fw_cfg_select(FWCfgState *s, uint16_t key)
+{
+    int ret;
+
+    s->cur_offset = 0;
+    if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
+        s->cur_entry = FW_CFG_INVALID;
+        ret = 0;
+    } else {
+        s->cur_entry = key;
+        ret = 1;
+    }
+
+    FW_CFG_DPRINTF("select key %d (%sfound)\n", key, ret ? "" : "not ");
+
+    return ret;
+}
+
+static uint8_t fw_cfg_read(FWCfgState *s)
+{
+    int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
+    FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
+    uint8_t ret;
+
+    if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len)
+        ret = 0;
+    else
+        ret = e->data[s->cur_offset++];
+
+    FW_CFG_DPRINTF("read %d\n", ret);
+
+    return ret;
+}
+
+static uint32_t fw_cfg_io_readb(void *opaque, uint32_t addr)
+{
+    return fw_cfg_read(opaque);
+}
+
+static void fw_cfg_io_writeb(void *opaque, uint32_t addr, uint32_t value)
+{
+    return fw_cfg_write(opaque, (uint8_t)value);
+}
+
+static void fw_cfg_io_writew(void *opaque, uint32_t addr, uint32_t value)
+{
+    fw_cfg_select(opaque, (uint16_t)value);
+}
+
+static uint32_t fw_cfg_mem_readb(void *opaque, target_phys_addr_t addr)
+{
+    return fw_cfg_read(opaque);
+}
+
+static void fw_cfg_mem_writeb(void *opaque, target_phys_addr_t addr,
+                              uint32_t value)
+{
+    return fw_cfg_write(opaque, (uint8_t)value);
+}
+
+static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr,
+                              uint32_t value)
+{
+    fw_cfg_select(opaque, (uint16_t)value);
+}
+
+static CPUReadMemoryFunc *fw_cfg_ctl_mem_read[3] = {
+    NULL,
+    NULL,
+    NULL,
+};
+
+static CPUWriteMemoryFunc *fw_cfg_ctl_mem_write[3] = {
+    NULL,
+    fw_cfg_mem_writew,
+    NULL,
+};
+
+static CPUReadMemoryFunc *fw_cfg_data_mem_read[3] = {
+    fw_cfg_mem_readb,
+    NULL,
+    NULL,
+};
+
+static CPUWriteMemoryFunc *fw_cfg_data_mem_write[3] = {
+    fw_cfg_mem_writeb,
+    NULL,
+    NULL,
+};
+
+static void fw_cfg_reset(void *opaque)
+{
+    FWCfgState *s = opaque;
+
+    fw_cfg_select(s, 0);
+}
+
+static void fw_cfg_save(QEMUFile *f, void *opaque)
+{
+    FWCfgState *s = opaque;
+
+    qemu_put_be16s(f, &s->cur_entry);
+    qemu_put_be16s(f, &s->cur_offset);
+}
+
+static int fw_cfg_load(QEMUFile *f, void *opaque, int version_id)
+{
+    FWCfgState *s = opaque;
+
+    if (version_id > 1)
+        return -EINVAL;
+
+    qemu_get_be16s(f, &s->cur_entry);
+    qemu_get_be16s(f, &s->cur_offset);
+
+    return 0;
+}
+
+int fw_cfg_add_bytes(void *opaque, uint16_t key, uint8_t *data, uint16_t len)
+{
+    FWCfgState *s = opaque;
+    int arch = !!(key & FW_CFG_ARCH_LOCAL);
+
+    key &= FW_CFG_ENTRY_MASK;
+
+    if (key >= FW_CFG_MAX_ENTRY)
+        return 0;
+
+    s->entries[arch][key].data = data;
+    s->entries[arch][key].len = len;
+
+    return 1;
+}
+
+int fw_cfg_add_i16(void *opaque, uint16_t key, uint16_t value)
+{
+    uint16_t *copy;
+
+    copy = qemu_malloc(sizeof(value));
+    if (!copy)
+        return 0;
+    *copy = cpu_to_le16(value);
+    return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
+}
+
+int fw_cfg_add_i32(void *opaque, uint16_t key, uint32_t value)
+{
+    uint32_t *copy;
+
+    copy = qemu_malloc(sizeof(value));
+    if (!copy)
+        return 0;
+    *copy = cpu_to_le32(value);
+    return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
+}
+
+int fw_cfg_add_i64(void *opaque, uint16_t key, uint64_t value)
+{
+    uint64_t *copy;
+
+    copy = qemu_malloc(sizeof(value));
+    if (!copy)
+        return 0;
+    *copy = cpu_to_le64(value);
+    return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
+}
+
+int fw_cfg_add_callback(void *opaque, uint16_t key, FWCfgCallback callback,
+                        void *callback_opaque, uint8_t *data, size_t len)
+{
+    FWCfgState *s = opaque;
+    int arch = !!(key & FW_CFG_ARCH_LOCAL);
+
+    key &= FW_CFG_ENTRY_MASK;
+
+    if (key >= FW_CFG_MAX_ENTRY || !(key & FW_CFG_WRITE_CHANNEL)
+        || len > 65535)
+        return 0;
+
+    s->entries[arch][key].data = data;
+    s->entries[arch][key].len = len;
+    s->entries[arch][key].callback_opaque = callback_opaque;
+    s->entries[arch][key].callback = callback;
+
+    return 1;
+}
+
+void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
+		target_phys_addr_t ctl_addr, target_phys_addr_t data_addr)
+{
+    FWCfgState *s;
+    int io_ctl_memory, io_data_memory;
+
+    s = qemu_mallocz(sizeof(FWCfgState));
+    if (!s)
+        return NULL;
+
+    if (ctl_port) {
+        register_ioport_write(ctl_port, 2, 2, fw_cfg_io_writew, s);
+    }
+    if (data_port) {
+        register_ioport_read(data_port, 1, 1, fw_cfg_io_readb, s);
+        register_ioport_write(data_port, 1, 1, fw_cfg_io_writeb, s);
+    }
+    if (ctl_addr) {
+        io_ctl_memory = cpu_register_io_memory(0, fw_cfg_ctl_mem_read,
+                                           fw_cfg_ctl_mem_write, s);
+        cpu_register_physical_memory(ctl_addr, FW_CFG_SIZE, io_ctl_memory);
+    }
+    if (data_addr) {
+        io_data_memory = cpu_register_io_memory(0, fw_cfg_data_mem_read,
+                                           fw_cfg_data_mem_write, s);
+        cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory);
+    }
+    fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
+    register_savevm("fw_cfg", -1, 1, fw_cfg_save, fw_cfg_load, s);
+    qemu_register_reset(fw_cfg_reset, s);
+    fw_cfg_reset(s);
+
+    return s;
+}
diff --git a/hw/fw_cfg.h b/hw/fw_cfg.h
new file mode 100644
index 0000000..b949c70
--- /dev/null
+++ b/hw/fw_cfg.h
@@ -0,0 +1,28 @@
+#ifndef FW_CFG_H
+#define FW_CFG_H
+
+#define FW_CFG_SIGNATURE        0x00
+#define FW_CFG_ID               0x01
+#define FW_CFG_MAX_ENTRY        0x10
+
+#define FW_CFG_WRITE_CHANNEL    0x4000
+#define FW_CFG_ARCH_LOCAL       0x8000
+#define FW_CFG_ENTRY_MASK       ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
+
+#define FW_CFG_INVALID          0xffff
+
+#ifndef NO_QEMU_PROTOS
+typedef void (*FWCfgCallback)(void *opaque, uint8_t *data);
+
+int fw_cfg_add_bytes(void *opaque, uint16_t key, uint8_t *data, uint16_t len);
+int fw_cfg_add_i16(void *opaque, uint16_t key, uint16_t value);
+int fw_cfg_add_i32(void *opaque, uint16_t key, uint32_t value);
+int fw_cfg_add_i64(void *opaque, uint16_t key, uint64_t value);
+int fw_cfg_add_callback(void *opaque, uint16_t key, FWCfgCallback callback,
+                        void *callback_opaque, uint8_t *data, size_t len);
+void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
+		target_phys_addr_t crl_addr, target_phys_addr_t data_addr);
+
+#endif /* NO_QEMU_PROTOS */
+
+#endif
diff --git a/hw/pc.c b/hw/pc.c
index 435c7d4..2230d4e 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -32,6 +32,7 @@
 #include "smbus.h"
 #include "boards.h"
 #include "console.h"
+#include "fw_cfg.h"
 
 /* output Bochs bios info messages */
 //#define DEBUG_BIOS
@@ -44,6 +45,7 @@
 
 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
 #define ACPI_DATA_SIZE       0x10000
+#define BIOS_CFG_IOPORT 0x510
 
 #define MAX_IDE_BUS 2
 
@@ -416,6 +418,8 @@ static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 
 static void bochs_bios_init(void)
 {
+    void *fw_cfg;
+
     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
@@ -426,6 +430,9 @@ static void bochs_bios_init(void)
     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
+
+    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 }
 
 /* Generate an initial boot sector which sets state and jump to
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 21f8899..9f2351a 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -34,6 +34,7 @@
 #include "scsi.h"
 #include "pc.h"
 #include "isa.h"
+#include "fw_cfg.h"
 
 //#define DEBUG_IRQ
 
@@ -78,6 +79,7 @@
 #define PROM_SIZE_MAX        (512 * 1024)
 #define PROM_VADDR           0xffd00000
 #define PROM_FILENAME        "openbios-sparc32"
+#define CFG_ADDR             0xd00000510ULL
 
 // Control plane, 8-bit and 24-bit planes
 #define TCX_SIZE             (9 * 1024 * 1024)
@@ -410,6 +412,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     char buf[1024];
     BlockDriverState *fd[MAX_FD];
     int drive_index;
+    void *fw_cfg;
 
     /* init CPUs */
     if (!cpu_model)
@@ -570,6 +573,9 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     if (hwdef->ecc_base != (target_phys_addr_t)-1)
         ecc_init(hwdef->ecc_base, slavio_irq[hwdef->ecc_irq],
                  hwdef->ecc_version);
+
+    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 }
 
 static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
@@ -589,6 +595,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     char buf[1024];
     BlockDriverState *fd[MAX_FD];
     int drive_index;
+    void *fw_cfg;
 
     /* init CPU */
     if (!cpu_model)
@@ -715,6 +722,9 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
                graphic_height, graphic_depth, hwdef->machine_id, "Sun4c");
+
+    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 }
 
 static const struct hwdef hwdefs[] = {
@@ -1405,6 +1415,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
     int ret;
     char buf[1024];
     int drive_index;
+    void *fw_cfg;
 
     /* init CPUs */
     if (!cpu_model)
@@ -1528,6 +1539,9 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
                graphic_height, graphic_depth, hwdef->machine_id, "Sun4d");
+
+    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 }
 
 /* SPARCserver 1000 hardware initialisation */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 42a765d..82ead81 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -31,6 +31,7 @@
 #include "sysemu.h"
 #include "boards.h"
 #include "firmware_abi.h"
+#include "fw_cfg.h"
 
 #define KERNEL_LOAD_ADDR     0x00404000
 #define CMDLINE_ADDR         0x003ff000
@@ -44,6 +45,7 @@
 #define PROM_FILENAME        "openbios-sparc64"
 #define NVRAM_SIZE           0x2000
 #define MAX_IDE_BUS          2
+#define BIOS_CFG_IOPORT      0x510
 
 struct hwdef {
     const char * const default_cpu_model;
@@ -270,6 +272,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
     int drive_index;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
+    void *fw_cfg;
 
     linux_boot = (kernel_filename != NULL);
 
@@ -415,6 +418,8 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
                            graphic_width, graphic_height, graphic_depth,
                            (uint8_t *)&nd_table[0].macaddr);
 
+    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 }
 
 static const struct hwdef hwdefs[] = {

[Qemu-devel] [PATCH v6 2/8] Add -uuid command line option.

[Gleb Natapov]

Let user specify UUID of the virtual machine.

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 sysemu.h |    2 ++
 vl.c     |   29 +++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/sysemu.h b/sysemu.h
index b12fae0..931ac3a 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -8,6 +8,8 @@ extern const char *bios_dir;
 
 extern int vm_running;
 extern const char *qemu_name;
+extern uint8_t qemu_uuid[];
+#define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-%02hhx%02hhx-%02hhx%02hhx-%02hhx%02hhx-%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx"
 
 typedef struct vm_change_state_entry VMChangeStateEntry;
 typedef void VMChangeStateHandler(void *opaque, int running);
diff --git a/vl.c b/vl.c
index 18bcc1f..918b7f5 100644
--- a/vl.c
+++ b/vl.c
@@ -257,6 +257,8 @@ static int64_t qemu_icount_bias;
 QEMUTimer *icount_rt_timer;
 QEMUTimer *icount_vm_timer;
 
+uint8_t qemu_uuid[16];
+
 #define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
 
 /***********************************************************/
@@ -7708,6 +7710,7 @@ static void help(int exitcode)
            "-g WxH[xDEPTH]  Set the initial graphical resolution and depth\n"
 #endif
            "-name string    set the name of the guest\n"
+           "-uuid %%08x-%%04x-%%04x-%%04x-%%012x specify machine UUID\n"
            "\n"
            "Network options:\n"
            "-net nic[,vlan=n][,macaddr=addr][,model=type]\n"
@@ -7902,6 +7905,7 @@ enum {
     QEMU_OPTION_startdate,
     QEMU_OPTION_tb_size,
     QEMU_OPTION_icount,
+    QEMU_OPTION_uuid,
 };
 
 typedef struct QEMUOption {
@@ -7990,6 +7994,7 @@ const QEMUOption qemu_options[] = {
 #ifdef CONFIG_CURSES
     { "curses", 0, QEMU_OPTION_curses },
 #endif
+    { "uuid", HAS_ARG, QEMU_OPTION_uuid },
 
     /* temporary options */
     { "usb", 0, QEMU_OPTION_usb },
@@ -8200,6 +8205,23 @@ static BOOL WINAPI qemu_ctrl_handler(DWORD type)
 }
 #endif
 
+static int qemu_uuid_parse(const char *str, uint8_t *uuid)
+{
+    int ret;
+
+    if(strlen(str) != 36)
+        return -1;
+
+    ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3],
+            &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9],
+            &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], &uuid[15]);
+
+    if(ret != 16)
+        return -1;
+
+    return 0;
+}
+
 #define MAX_NET_CLIENTS 32
 
 #ifndef _WIN32
@@ -8778,6 +8800,13 @@ int main(int argc, char **argv)
             case QEMU_OPTION_show_cursor:
                 cursor_hide = 0;
                 break;
+            case QEMU_OPTION_uuid:
+                if(qemu_uuid_parse(optarg, qemu_uuid) < 0) {
+                    fprintf(stderr, "Fail to parse UUID string."
+                            " Wrong format.\n");
+                    exit(1);
+                }
+                break;
 	    case QEMU_OPTION_daemonize:
 		daemonize = 1;
 		break;

[Qemu-devel] [PATCH v6 3/8] Add "info uuid" command to monitor.

[Gleb Natapov]

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 monitor.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/monitor.c b/monitor.c
index 43b188a..dfcf025 100644
--- a/monitor.c
+++ b/monitor.c
@@ -253,6 +253,15 @@ static void do_info_name(void)
         term_printf("%s\n", qemu_name);
 }
 
+static void do_info_uuid(void)
+{
+    term_printf(UUID_FMT "\n", qemu_uuid[0], qemu_uuid[1], qemu_uuid[2],
+            qemu_uuid[3], qemu_uuid[4], qemu_uuid[5], qemu_uuid[6],
+            qemu_uuid[7], qemu_uuid[8], qemu_uuid[9], qemu_uuid[10],
+            qemu_uuid[11], qemu_uuid[12], qemu_uuid[13], qemu_uuid[14],
+            qemu_uuid[15]);
+}
+
 static void do_info_block(void)
 {
     bdrv_info();
@@ -1501,6 +1510,8 @@ static term_cmd_t info_cmds[] = {
       "", "show the vnc server status"},
     { "name", "", do_info_name,
       "", "show the current VM name" },
+    { "uuid", "", do_info_uuid,
+      "", "show the current VM UUID" },
 #if defined(TARGET_PPC)
     { "cpustats", "", do_info_cpu_stats,
       "", "show CPU statistics", },

[Qemu-devel] [PATCH v6 4/8] Use libuuid if available.

[Gleb Natapov]

If libuuid is available use it for UUID generation in case a user asks for it.

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 Makefile.target |    4 ++++
 configure       |   21 +++++++++++++++++++++
 vl.c            |   19 +++++++++++++++++++
 3 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/Makefile.target b/Makefile.target
index e3bceac..a3399d7 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -519,6 +519,10 @@ CPPFLAGS += $(CONFIG_VNC_TLS_CFLAGS)
 LIBS += $(CONFIG_VNC_TLS_LIBS)
 endif
 
+ifdef CONFIG_UUID
+LIBS += -luuid
+endif
+
 # SCSI layer
 OBJS+= lsi53c895a.o esp.o
 
diff --git a/configure b/configure
index f1ee0af..b914ac5 100755
--- a/configure
+++ b/configure
@@ -110,6 +110,7 @@ curses="yes"
 aio="yes"
 nptl="yes"
 mixemu="no"
+uuid="yes"
 
 # OS specific
 targetos=`uname -s`
@@ -316,6 +317,8 @@ for opt do
   ;;
   --enable-uname-release=*) uname_release="$optarg"
   ;;
+  --disable-uuid) uuid="no"
+  ;;
   --sparc_cpu=*)
       sparc_cpu="$optarg"
       case $sparc_cpu in
@@ -785,6 +788,19 @@ EOF
 fi
 
 ##########################################
+# uuid library
+if test "$uuid" = "yes" ; then
+  uuid=no
+  cat > $TMPC << EOF
+#include <uuid/uuid.h>
+int main(void) { uuid_t u; return 0; }
+EOF
+  if $cc -o $TMPE $TMPC -luuid 2> /dev/null ; then
+    uuid=yes
+  fi
+fi
+
+##########################################
 # Sound support libraries probe
 
 audio_drv_probe()
@@ -966,6 +982,7 @@ echo "uname -r          $uname_release"
 echo "NPTL support      $nptl"
 echo "vde support       $vde"
 echo "AIO support       $aio"
+echo "UUID support      $uuid"
 
 if test $sdl_too_old = "yes"; then
 echo "-> Your SDL version is too old - please upgrade to have SDL support"
@@ -1173,6 +1190,10 @@ if test "$vnc_tls" = "yes" ; then
   echo "CONFIG_VNC_TLS_LIBS=$vnc_tls_libs" >> $config_mak
   echo "#define CONFIG_VNC_TLS 1" >> $config_h
 fi
+if test "$uuid" = "yes" ; then
+  echo "CONFIG_UUID=yes" >> $config_mak
+  echo "#define CONFIG_UUID 1" >> $config_h
+fi
 qemu_version=`head $source_path/VERSION`
 echo "VERSION=$qemu_version" >>$config_mak
 echo "#define QEMU_VERSION \"$qemu_version\"" >> $config_h
diff --git a/vl.c b/vl.c
index 918b7f5..15d2dec 100644
--- a/vl.c
+++ b/vl.c
@@ -142,6 +142,11 @@ int inet_aton(const char *cp, struct in_addr *ia);
 
 #include "exec-all.h"
 
+#ifdef CONFIG_UUID
+#include <uuid/uuid.h>
+static int generate_uuid;
+#endif
+
 #define DEFAULT_NETWORK_SCRIPT "/etc/qemu-ifup"
 #define DEFAULT_NETWORK_DOWN_SCRIPT "/etc/qemu-ifdown"
 #ifdef __sun__
@@ -8801,6 +8806,15 @@ int main(int argc, char **argv)
                 cursor_hide = 0;
                 break;
             case QEMU_OPTION_uuid:
+                if (strcmp(optarg, "gen") == 0) {
+#ifdef CONFIG_UUID
+                    generate_uuid = 1;
+                    break;
+#else
+		    fprintf(stderr, "UUID generation not supported.\n");
+		    exit(1);
+#endif
+                }
                 if(qemu_uuid_parse(optarg, qemu_uuid) < 0) {
                     fprintf(stderr, "Fail to parse UUID string."
                             " Wrong format.\n");
@@ -8906,6 +8920,11 @@ int main(int argc, char **argv)
            monitor_device = "stdio";
     }
 
+#if CONFIG_UUID
+    if (generate_uuid)
+        uuid_generate(qemu_uuid);
+#endif
+
 #ifndef _WIN32
     if (daemonize) {
 	pid_t pid;

[Qemu-devel] [PATCH v6 5/8] Add UUID to firmware configuration info.

[Gleb Natapov]

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 hw/fw_cfg.c |    2 ++
 hw/fw_cfg.h |    1 +
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index db5f0bd..355beb6 100644
--- a/hw/fw_cfg.c
+++ b/hw/fw_cfg.c
@@ -22,6 +22,7 @@
  * THE SOFTWARE.
  */
 #include "hw.h"
+#include "sysemu.h"
 #include "isa.h"
 #include "fw_cfg.h"
 
@@ -281,6 +282,7 @@ void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
         cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory);
     }
     fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
+    fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
     register_savevm("fw_cfg", -1, 1, fw_cfg_save, fw_cfg_load, s);
     qemu_register_reset(fw_cfg_reset, s);
     fw_cfg_reset(s);
diff --git a/hw/fw_cfg.h b/hw/fw_cfg.h
index b949c70..909c8b9 100644
--- a/hw/fw_cfg.h
+++ b/hw/fw_cfg.h
@@ -3,6 +3,7 @@
 
 #define FW_CFG_SIGNATURE        0x00
 #define FW_CFG_ID               0x01
+#define FW_CFG_UUID             0x02
 #define FW_CFG_MAX_ENTRY        0x10
 
 #define FW_CFG_WRITE_CHANNEL    0x4000

[Qemu-devel] [PATCH v6 6/8] Pass cpu speed into SM BIOS.

[Gleb Natapov]

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
---

 hw/pc.c |   88 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 88 insertions(+), 0 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 2230d4e..9d9c244 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -49,6 +49,8 @@
 
 #define MAX_IDE_BUS 2
 
+#define FW_CFG_PC_CPUSPEED (FW_CFG_ARCH_LOCAL + 0x00)
+
 static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PITState *pit;
@@ -369,6 +371,89 @@ static uint32_t ioport92_read(void *opaque, uint32_t addr)
     return ioport_get_a20() << 1;
 }
 
+#ifdef __linux__
+/* get_freq () function is taken from conky source code */
+#define CPUFREQ_PREFIX "/sys/devices/system/cpu"
+#define CPUFREQ_POSTFIX "cpufreq/scaling_cur_freq"
+
+/* return system frequency in MHz (use divisor=1) or GHz (use divisor=1000) */
+static double get_freq(int divisor, unsigned int cpu)
+{
+	FILE *f;
+	char frequency[32];
+	char s[256];
+	double freq = 0;
+
+	if (divisor <= 0)
+		return 0;
+
+	snprintf(s, 256, "%s/cpu%d/%s", CPUFREQ_PREFIX, cpu - 1, CPUFREQ_POSTFIX);
+	f = fopen(s, "r");
+	if (f) {
+		/* if there's a cpufreq /sys node, read the current frequency from
+		 * this node and divide by 1000 to get Mhz. */
+		if (fgets(s, sizeof(s), f)) {
+			s[strlen(s) - 1] = '\0';
+			freq = strtod(s, NULL);
+		}
+		fclose(f);
+		return (freq / 1000) / divisor;
+	}
+
+	// open the CPU information file
+	f = fopen("/proc/cpuinfo", "r");
+	if (!f) {
+		perror("Failed to access '/proc/cpuinfo' at get_freq()");
+		return 0;
+	}
+
+	// read the file
+	while (fgets(s, sizeof(s), f) != NULL) {
+
+#if defined(__i386) || defined(__x86_64)
+		// and search for the cpu mhz
+		if (strncmp(s, "cpu MHz", 7) == 0 && cpu == 0) {
+#else
+#if defined(__alpha)
+		// different on alpha
+		if (strncmp(s, "cycle frequency [Hz]", 20) == 0 && cpu == 0) {
+#else
+		// this is different on ppc for some reason
+		if (strncmp(s, "clock", 5) == 0 && cpu == 0) {
+#endif // defined(__alpha)
+#endif // defined(__i386) || defined(__x86_64)
+
+			// copy just the number
+			strcpy(frequency, strchr(s, ':') + 2);
+#if defined(__alpha)
+			// strip " est.\n"
+			frequency[strlen(frequency) - 6] = '\0';
+			// kernel reports in Hz
+			freq = strtod(frequency, NULL) / 1000000;
+#else
+			// strip \n
+			frequency[strlen(frequency) - 1] = '\0';
+			freq = strtod(frequency, NULL);
+#endif
+			break;
+		}
+		if (strncmp(s, "processor", 9) == 0) {
+			cpu--;
+			continue;
+		}
+	}
+
+	fclose(f);
+	return freq / divisor;
+}
+#else
+static double get_freq(int divisor, unsigned int cpu)
+{
+    return 0;
+}
+#endif
+
+
 /***********************************************************/
 /* Bochs BIOS debug ports */
 
@@ -418,6 +503,7 @@ static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 
 static void bochs_bios_init(void)
 {
+    uint16_t cpu_speed;
     void *fw_cfg;
 
     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
@@ -433,6 +519,8 @@ static void bochs_bios_init(void)
 
     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+    cpu_speed = (uint16_t)get_freq(1, 1);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_PC_CPUSPEED, cpu_speed);
 }
 
 /* Generate an initial boot sector which sets state and jump to

[Qemu-devel] [PATCH v6 7/8] Add common keys to firmware configuration

[Gleb Natapov]

From: Blue Swirl <blauwirbel@gmail.com>


---

 hw/fw_cfg.c |    4 +++
 hw/fw_cfg.h |    4 +++
 hw/pc.c     |    1 +
 hw/sun4m.c  |   77 ++++++++++++++++++++++++++++++++++++++++++++---------------
 hw/sun4u.c  |   10 ++++++++
 5 files changed, 77 insertions(+), 19 deletions(-)

diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index 355beb6..0012d10 100644
--- a/hw/fw_cfg.c
+++ b/hw/fw_cfg.c
@@ -259,6 +259,7 @@ void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
 {
     FWCfgState *s;
     int io_ctl_memory, io_data_memory;
+    extern int nographic;
 
     s = qemu_mallocz(sizeof(FWCfgState));
     if (!s)
@@ -283,6 +284,9 @@ void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
     }
     fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
     fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
+    fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)nographic);
+    fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
+
     register_savevm("fw_cfg", -1, 1, fw_cfg_save, fw_cfg_load, s);
     qemu_register_reset(fw_cfg_reset, s);
     fw_cfg_reset(s);
diff --git a/hw/fw_cfg.h b/hw/fw_cfg.h
index 909c8b9..ef8f378 100644
--- a/hw/fw_cfg.h
+++ b/hw/fw_cfg.h
@@ -4,6 +4,10 @@
 #define FW_CFG_SIGNATURE        0x00
 #define FW_CFG_ID               0x01
 #define FW_CFG_UUID             0x02
+#define FW_CFG_RAM_SIZE         0x03
+#define FW_CFG_NOGRAPHIC        0x04
+#define FW_CFG_NB_CPUS          0x05
+#define FW_CFG_MACHINE_ID       0x06
 #define FW_CFG_MAX_ENTRY        0x10
 
 #define FW_CFG_WRITE_CHANNEL    0x4000
diff --git a/hw/pc.c b/hw/pc.c
index 9d9c244..b48c3c7 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -521,6 +521,7 @@ static void bochs_bios_init(void)
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
     cpu_speed = (uint16_t)get_freq(1, 1);
     fw_cfg_add_i16(fw_cfg, FW_CFG_PC_CPUSPEED, cpu_speed);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 }
 
 /* Generate an initial boot sector which sets state and jump to
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 9f2351a..a7456b9 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -101,7 +101,8 @@ struct hwdef {
     // register bit numbers
     int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq;
     int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq, ecc_irq;
-    int machine_id; // For NVRAM
+    uint8_t nvram_machine_id;
+    uint16_t machine_id;
     uint32_t iommu_version;
     uint32_t intbit_to_level[32];
     uint64_t max_mem;
@@ -122,7 +123,8 @@ struct sun4d_hwdef {
     // IRQ numbers are not PIL ones, but SBI register bit numbers
     int esp_irq, le_irq, clock_irq, clock1_irq;
     int ser_irq, ms_kb_irq, me_irq;
-    int machine_id; // For NVRAM
+    uint8_t nvram_machine_id;
+    uint16_t machine_id;
     uint32_t iounit_version;
     uint64_t max_mem;
     const char * const default_cpu_model;
@@ -178,7 +180,7 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
                        const char *boot_devices, ram_addr_t RAM_size,
                        uint32_t kernel_size,
                        int width, int height, int depth,
-                       int machine_id, const char *arch)
+                       int nvram_machine_id, const char *arch)
 {
     unsigned int i;
     uint32_t start, end;
@@ -251,7 +253,8 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
     end = 0x1fd0;
     OpenBIOS_finish_partition(part_header, end - start);
 
-    Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr, machine_id);
+    Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr,
+                    nvram_machine_id);
 
     for (i = 0; i < sizeof(image); i++)
         m48t59_write(nvram, i, image[i]);
@@ -568,7 +571,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
-               graphic_height, graphic_depth, hwdef->machine_id, "Sun4m");
+               graphic_height, graphic_depth, hwdef->nvram_machine_id,
+               "Sun4m");
 
     if (hwdef->ecc_base != (target_phys_addr_t)-1)
         ecc_init(hwdef->ecc_base, slavio_irq[hwdef->ecc_irq],
@@ -576,6 +580,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
 
     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
 }
 
 static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
@@ -721,12 +727,30 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
-               graphic_height, graphic_depth, hwdef->machine_id, "Sun4c");
+               graphic_height, graphic_depth, hwdef->nvram_machine_id,
+               "Sun4c");
 
     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
 }
 
+enum {
+    ss2_id = 0,
+    ss5_id = 32,
+    vger_id,
+    lx_id,
+    ss4_id,
+    scls_id,
+    sbook_id,
+    ss10_id = 64,
+    ss20_id,
+    ss600mp_id,
+    ss1000_id = 96,
+    ss2000_id,
+};
+
 static const struct hwdef hwdefs[] = {
     /* SS-5 */
     {
@@ -761,7 +785,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = 5,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = ss5_id,
         .iommu_version = 0x05000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -805,7 +830,8 @@ static const struct hwdef hwdefs[] = {
         .me_irq = 30,
         .cs_irq = -1,
         .ecc_irq = 28,
-        .machine_id = 0x72,
+        .nvram_machine_id = 0x72,
+        .machine_id = ss10_id,
         .iommu_version = 0x03000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -849,7 +875,8 @@ static const struct hwdef hwdefs[] = {
         .me_irq = 30,
         .cs_irq = -1,
         .ecc_irq = 28,
-        .machine_id = 0x71,
+        .nvram_machine_id = 0x71,
+        .machine_id = ss600mp_id,
         .iommu_version = 0x01000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -893,7 +920,8 @@ static const struct hwdef hwdefs[] = {
         .me_irq = 30,
         .cs_irq = -1,
         .ecc_irq = 28,
-        .machine_id = 0x72,
+        .nvram_machine_id = 0x72,
+        .machine_id = ss20_id,
         .iommu_version = 0x13000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -933,7 +961,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 1,
         .me_irq = 1,
         .cs_irq = -1,
-        .machine_id = 0x55,
+        .nvram_machine_id = 0x55,
+        .machine_id = ss2_id,
         .max_mem = 0x10000000,
         .default_cpu_model = "Cypress CY7C601",
     },
@@ -970,7 +999,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = -1,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = vger_id,
         .iommu_version = 0x05000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -1012,7 +1042,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = -1,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = lx_id,
         .iommu_version = 0x04000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -1054,7 +1085,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = 5,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = ss4_id,
         .iommu_version = 0x05000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -1096,7 +1128,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = -1,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = scls_id,
         .iommu_version = 0x05000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -1138,7 +1171,8 @@ static const struct hwdef hwdefs[] = {
         .fd_irq = 22,
         .me_irq = 30,
         .cs_irq = -1,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = sbook_id,
         .iommu_version = 0x05000000,
         .intbit_to_level = {
             2, 3, 5, 7, 9, 11, 0, 14,   3, 5, 7, 9, 11, 13, 12, 12,
@@ -1359,7 +1393,8 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
         .clock1_irq = 10,
         .ms_kb_irq = 12,
         .ser_irq = 12,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = ss1000_id,
         .iounit_version = 0x03000000,
         .max_mem = 0xf00000000ULL,
         .default_cpu_model = "TI SuperSparc II",
@@ -1392,7 +1427,8 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
         .clock1_irq = 10,
         .ms_kb_irq = 12,
         .ser_irq = 12,
-        .machine_id = 0x80,
+        .nvram_machine_id = 0x80,
+        .machine_id = ss2000_id,
         .iounit_version = 0x03000000,
         .max_mem = 0xf00000000ULL,
         .default_cpu_model = "TI SuperSparc II",
@@ -1538,10 +1574,13 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
-               graphic_height, graphic_depth, hwdef->machine_id, "Sun4d");
+               graphic_height, graphic_depth, hwdef->nvram_machine_id,
+               "Sun4d");
 
     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
 }
 
 /* SPARCserver 1000 hardware initialisation */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 82ead81..00dac2d 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -49,6 +49,7 @@
 
 struct hwdef {
     const char * const default_cpu_model;
+    uint16_t machine_id;
 };
 
 int DMA_get_channel_mode (int nchan)
@@ -420,16 +421,25 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
 
     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
 }
 
+enum {
+    sun4u_id = 0,
+    sun4v_id = 64,
+};
+
 static const struct hwdef hwdefs[] = {
     /* Sun4u generic PC-like machine */
     {
         .default_cpu_model = "TI UltraSparc II",
+        .machine_id = sun4u_id,
     },
     /* Sun4v generic PC-like machine */
     {
         .default_cpu_model = "Sun UltraSparc T1",
+        .machine_id = sun4v_id,
     },
 };
 

[Qemu-devel] [PATCH v6 8/8] Add sparc keys to firmware configuration.

[Gleb Natapov]

From: Blue Swirl <blauwirbel@gmail.com>


---

 hw/sun4m.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/hw/sun4m.c b/hw/sun4m.c
index a7456b9..fcd0ace 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -80,6 +80,7 @@
 #define PROM_VADDR           0xffd00000
 #define PROM_FILENAME        "openbios-sparc32"
 #define CFG_ADDR             0xd00000510ULL
+#define FW_CFG_SUN4M_DEPTH   (FW_CFG_ARCH_LOCAL + 0x00)
 
 // Control plane, 8-bit and 24-bit planes
 #define TCX_SIZE             (9 * 1024 * 1024)
@@ -582,6 +583,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
 }
 
 static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,

Re: [Qemu-devel] [PATCH v6 4/8] Use libuuid if available.

[Paul Brook]

On Thursday 11 September 2008, Gleb Natapov wrote:
> If libuuid is available use it for UUID generation in case a user asks for
> it.

I don't think this feature is worth the extra dependency.  IMHO Generation of 
UUIDs should be left to the management utility. Anyone invoking qemu manually 
can trivially generate a UUID using commonly available tools (e.g. uuidgen).

If we really must have this feature then you need to document it.

Paul

Re: [Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Blue Swirl]

[-- Attachment #1: Type: text/plain, Size: 786 bytes --]

On 9/11/08, Gleb Natapov <gleb@qumranet.com> wrote:
> Hi,
>
>  Here the latest version of the patch series.
>
>  This patch series implements simple key/value base communication channel
>  to pass firmware configuration from qemu to guest firmware in patch 1.
>  Patches 2-5 implement UUID support. Patch 6 implements CPU speed detection
>  needed by SMBIOS. Patch 7 adds more common keys that may be used by
>  various firmwares. Patch 8 add sparc specific keys.

I have updated my patch for OpenBIOS on Sparc32/64 to support the
changed interface. I think we should be ready to apply most of the
patches. Paul had reservations about libuuid, so that patch should be
left out for now. Likewise for the CPU speed patch.

I propose to apply patches 1, 2, 3, 5, 7, and 8. Any objections?

[-- Attachment #2: openbios_new_fw_abi.diff --]
[-- Type: plain/text, Size: 27251 bytes --]

Re: [Qemu-devel] [PATCH v6 4/8] Use libuuid if available.

[Gleb Natapov]

On Thu, Sep 11, 2008 at 03:05:00PM +0100, Paul Brook wrote:
> On Thursday 11 September 2008, Gleb Natapov wrote:
> > If libuuid is available use it for UUID generation in case a user asks for
> > it.
> 
> I don't think this feature is worth the extra dependency.  IMHO Generation of 
> UUIDs should be left to the management utility. Anyone invoking qemu manually 
> can trivially generate a UUID using commonly available tools (e.g. uuidgen).
> 
> If we really must have this feature then you need to document it.
> 
I don't think it's must. Lets ignore it for now.

--
			Gleb.

Re: [Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Gleb Natapov]

On Thu, Sep 11, 2008 at 10:30:28PM +0300, Blue Swirl wrote:
> I propose to apply patches 1, 2, 3, 5, 7, and 8. Any objections?
There was no objections as far as I can see. Can somebody commit them please.

--
			Gleb.

Re: [Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Blue Swirl]

On 9/16/08, Gleb Natapov <gleb@qumranet.com> wrote:
> On Thu, Sep 11, 2008 at 10:30:28PM +0300, Blue Swirl wrote:
>  > I propose to apply patches 1, 2, 3, 5, 7, and 8. Any objections?
>
> There was no objections as far as I can see. Can somebody commit them please.

I usually wait one week for comments or objections, because people
could be travelling or otherwise busy. There are still two days left.

Re: [Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Blue Swirl]

On 9/16/08, Blue Swirl <blauwirbel@gmail.com> wrote:
> On 9/16/08, Gleb Natapov <gleb@qumranet.com> wrote:
>  > On Thu, Sep 11, 2008 at 10:30:28PM +0300, Blue Swirl wrote:
>  >  > I propose to apply patches 1, 2, 3, 5, 7, and 8. Any objections?
>  >
>  > There was no objections as far as I can see. Can somebody commit them please.
>
>
> I usually wait one week for comments or objections, because people
>  could be travelling or otherwise busy. There are still two days left.

Thanks, I applied the patches.

Re: [Qemu-devel] [PATCH v6 0/8] Add new firmware configuration mechanism

[Gleb Natapov]

On Thu, Sep 18, 2008 at 09:36:13PM +0300, Blue Swirl wrote:
> On 9/16/08, Blue Swirl <blauwirbel@gmail.com> wrote:
> > On 9/16/08, Gleb Natapov <gleb@qumranet.com> wrote:
> >  > On Thu, Sep 11, 2008 at 10:30:28PM +0300, Blue Swirl wrote:
> >  >  > I propose to apply patches 1, 2, 3, 5, 7, and 8. Any objections?
> >  >
> >  > There was no objections as far as I can see. Can somebody commit them please.
> >
> >
> > I usually wait one week for comments or objections, because people
> >  could be travelling or otherwise busy. There are still two days left.
> 
> Thanks, I applied the patches.
> 
Thanks. I'll send patch for bios to bochs list next week.

--
			Gleb.