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From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [5281] Use the new concat_i32_i64 op for std and stda
Date: Mon, 22 Sep 2008 17:47:13 +0100
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To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>

On Monday 22 September 2008, Blue Swirl wrote:
> On 9/22/08, Thiemo Seufer <ths@networkno.de> wrote:
> > Blue Swirl wrote:
> >  > On 9/21/08, Paul Brook <paul@codesourcery.com> wrote:
> >  > > > Like these patches?
> >  > > >
> >  > >  > +static inline void tcg_gen_concat_i64_i64(TCGv dest, TCGv low,
> >  > >  > TCGv high) +{
> >  > >  > +    TCGv tmp = tcg_temp_new(TCG_TYPE_I64);
> >  > >  > +    tcg_gen_shli_i64(tmp, high, 32);
> >  > >  > +    tcg_gen_or_i64(dest, low, tmp);
> >  > >  > +    tcg_temp_free(tmp);
> >  > >  > +}
> >  > >
> >  > >  This should use concat_i32_i64 on 32-bit hosts.
> >  > >
> >  > >  Ok with that change, the rename I suggested in my previous mail,
> >  > > and if you add documentation to tcg/README.
> >  >
> >  > Updated. I'll run a couple of tests.
> >
> > I noticed I could also use the complement ("split"?) to those
> >  instructions in the mips backend. Maybe the same is true for
> >  sparc.
>
> Currently I'm using the following:
>                         tcg_gen_trunc_i64_tl(cpu_tmp0, cpu_tmp64);
>                         tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffffULL);
>                         gen_movl_TN_reg(rd + 1, cpu_tmp0);
>                         tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32);
>                         tcg_gen_trunc_i64_tl(cpu_val, cpu_tmp64);
>                         tcg_gen_andi_tl(cpu_val, cpu_val, 0xffffffffULL);
>
> On a 32 bit host a much more efficient method could be used if wrapped in
> an op.

Which bits would be more efficient?

Note that the final andi is superfluous.

Paul