Re: [Qemu-devel] [5317] Core 2 Duo specification (Alexander Graf).

[Jens Axboe <qemu@kernel.dk>]

On Thu, Sep 25 2008, Andrzej Zaborowski wrote:
> Revision: 5317
>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5317
> Author:   balrog
> Date:     2008-09-25 18:11:30 +0000 (Thu, 25 Sep 2008)
> 
> Log Message:
> -----------
> Core 2 Duo specification (Alexander Graf).
> 
> This patch adds a Core 2 Duo CPU to the available CPU types. The CPU
> definition tries to resemble a real CPU as good as possible, whilst not
> exposing features qemu does not implement.
> The patch also includes some minor additions that Core 2 Duo CPUs have:
> 
> - New MSR: MSR_IA32_PERF_STATUS
> - CPUID up to level 5 (cache info and mwait)
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> 
> Modified Paths:
> --------------
>     trunk/target-i386/cpu.h
>     trunk/target-i386/helper.c
>     trunk/target-i386/op_helper.c
> 
> Modified: trunk/target-i386/cpu.h
> ===================================================================
> --- trunk/target-i386/cpu.h	2008-09-25 18:08:05 UTC (rev 5316)
> +++ trunk/target-i386/cpu.h	2008-09-25 18:11:30 UTC (rev 5317)
> @@ -242,6 +242,8 @@
>  #define MSR_MCG_STATUS                  0x17a
>  #define MSR_MCG_CTL                     0x17b
>  
> +#define MSR_IA32_PERF_STATUS            0x198
> +
>  #define MSR_PAT                         0x277
>  
>  #define MSR_EFER                        0xc0000080
> @@ -341,6 +343,9 @@
>  #define CPUID_VENDOR_AMD_2   0x69746e65 /* "enti" */ 
>  #define CPUID_VENDOR_AMD_3   0x444d4163 /* "cAMD" */
>  
> +#define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
> +#define CPUID_MWAIT_EMX     (0 << 1) /* enumeration supported */

Ehm, should that not be

#define CPUID_MWAIT_EMX     (1 << 0)

-- 
Jens Axboe