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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] x86 MMX register access problem seen on Sparc host
Date: Wed, 1 Oct 2008 14:38:58 +0200	[thread overview]
Message-ID: <20081001123858.GA20525@volta.aurel32.net> (raw)
In-Reply-To: <Pine.LNX.4.64.0809220142030.3405@linmac.oyster.ru>

On Mon, Sep 22, 2008 at 01:44:55AM +0400, malc wrote:
> On Mon, 22 Sep 2008, malc wrote:
>
>> On Sun, 21 Sep 2008, Blue Swirl wrote:
>>
>>> Hi,
>>>
>>> I get these warnings when compiling i386 targets on Sparc host using a
>>> gcc 4.3 series compiler:
>>> /src/qemu/target-i386/ops_sse.h: In function 'helper_pmovmskb_mmx':
>>> /src/qemu/target-i386/ops_sse.h:982: warning: array subscript is above
>>> array bounds
>>> etc.
>>>
>>> The first line is the following:
>>>    val |= (s->XMM_B(0) >> 7);
>>
>> All the lines before #if SHIFT == 1 should be MMX_B really.
>
> Scratch that. It should be this instead:

Acked-By: <aurelien@aurel32.net>

Care to commit the patch?

> diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h
> index 7568681..2b594db 100644
> --- a/target-i386/ops_sse.h
> +++ b/target-i386/ops_sse.h
> @@ -979,23 +979,23 @@ uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
>  {
>      uint32_t val;
>      val = 0;
> -    val |= (s->XMM_B(0) >> 7);
> -    val |= (s->XMM_B(1) >> 6) & 0x02;
> -    val |= (s->XMM_B(2) >> 5) & 0x04;
> -    val |= (s->XMM_B(3) >> 4) & 0x08;
> -    val |= (s->XMM_B(4) >> 3) & 0x10;
> -    val |= (s->XMM_B(5) >> 2) & 0x20;
> -    val |= (s->XMM_B(6) >> 1) & 0x40;
> -    val |= (s->XMM_B(7)) & 0x80;
> +    val |= (s->B(0) >> 7);
> +    val |= (s->B(1) >> 6) & 0x02;
> +    val |= (s->B(2) >> 5) & 0x04;
> +    val |= (s->B(3) >> 4) & 0x08;
> +    val |= (s->B(4) >> 3) & 0x10;
> +    val |= (s->B(5) >> 2) & 0x20;
> +    val |= (s->B(6) >> 1) & 0x40;
> +    val |= (s->B(7)) & 0x80;
>  #if SHIFT == 1
> -    val |= (s->XMM_B(8) << 1) & 0x0100;
> -    val |= (s->XMM_B(9) << 2) & 0x0200;
> -    val |= (s->XMM_B(10) << 3) & 0x0400;
> -    val |= (s->XMM_B(11) << 4) & 0x0800;
> -    val |= (s->XMM_B(12) << 5) & 0x1000;
> -    val |= (s->XMM_B(13) << 6) & 0x2000;
> -    val |= (s->XMM_B(14) << 7) & 0x4000;
> -    val |= (s->XMM_B(15) << 8) & 0x8000;
> +    val |= (s->B(8) << 1) & 0x0100;
> +    val |= (s->B(9) << 2) & 0x0200;
> +    val |= (s->B(10) << 3) & 0x0400;
> +    val |= (s->B(11) << 4) & 0x0800;
> +    val |= (s->B(12) << 5) & 0x1000;
> +    val |= (s->B(13) << 6) & 0x2000;
> +    val |= (s->B(14) << 7) & 0x4000;
> +    val |= (s->B(15) << 8) & 0x8000;
>  #endif
>      return val;
>  }
>
>>
>>>
>>> In cpu.h, the macro is defined on big endian host as
>>> #define XMM_B(n) _b[15 - (n)]
>>>
>>> But the type of Reg argument is MMXReg for pmovmskb_mmx and then the
>>> _b array has only 8 items.
>>>
>>>
>>
>>
>
> -- 
> mailto:av1474@comtv.ru
>
>
>

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

  reply	other threads:[~2008-10-01 12:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-09-21  8:20 [Qemu-devel] x86 MMX register access problem seen on Sparc host Blue Swirl
2008-09-21 20:49 ` malc
2008-09-21 21:44   ` malc
2008-10-01 12:38     ` Aurelien Jarno [this message]
2008-10-01 17:26       ` malc
2008-11-15 11:02         ` Aurelien Jarno
2008-11-15 19:11           ` malc

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