From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KpnYZ-000837-Oi for qemu-devel@nongnu.org; Tue, 14 Oct 2008 13:19:39 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KpnYZ-00082p-87 for qemu-devel@nongnu.org; Tue, 14 Oct 2008 13:19:39 -0400 Received: from [199.232.76.173] (port=38064 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KpnYZ-00082j-3z for qemu-devel@nongnu.org; Tue, 14 Oct 2008 13:19:39 -0400 Received: from mail.codesourcery.com ([65.74.133.4]:52222) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KpnYY-0001DH-Ep for qemu-devel@nongnu.org; Tue, 14 Oct 2008 13:19:38 -0400 Date: Tue, 14 Oct 2008 10:19:35 -0700 From: Nathan Froyd Message-ID: <20081014171934.GL18389@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH][ppc] convert SPE logical instructions to TCG Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org As the subject suggests. I was unsure of whether to use the cpu_T array or just create new TCG locals; I opted for the latter approach, since that approach seems a little more in spirit with how TCG is supposed to be used, even if it's at odds with the rest of the PPC backend. If this decision is a poor one, let me know and I can update the patch. -Nathan Index: target-ppc/op.c =================================================================== --- target-ppc/op.c (revision 5485) +++ target-ppc/op.c (working copy) @@ -2513,54 +2513,6 @@ RETURN(); } -void OPPROTO op_evand (void) -{ - T0_64 &= T1_64; - RETURN(); -} - -void OPPROTO op_evandc (void) -{ - T0_64 &= ~T1_64; - RETURN(); -} - -void OPPROTO op_evor (void) -{ - T0_64 |= T1_64; - RETURN(); -} - -void OPPROTO op_evxor (void) -{ - T0_64 ^= T1_64; - RETURN(); -} - -void OPPROTO op_eveqv (void) -{ - T0_64 = ~(T0_64 ^ T1_64); - RETURN(); -} - -void OPPROTO op_evnor (void) -{ - T0_64 = ~(T0_64 | T1_64); - RETURN(); -} - -void OPPROTO op_evorc (void) -{ - T0_64 |= ~T1_64; - RETURN(); -} - -void OPPROTO op_evnand (void) -{ - T0_64 = ~(T0_64 & T1_64); - RETURN(); -} - void OPPROTO op_evsrws (void) { do_evsrws(); Index: target-ppc/translate.c =================================================================== --- target-ppc/translate.c (revision 5485) +++ target-ppc/translate.c (working copy) @@ -5453,14 +5453,139 @@ } /* Logical */ -GEN_SPEOP_ARITH2(evand); -GEN_SPEOP_ARITH2(evandc); -GEN_SPEOP_ARITH2(evxor); -GEN_SPEOP_ARITH2(evor); -GEN_SPEOP_ARITH2(evnor); -GEN_SPEOP_ARITH2(eveqv); -GEN_SPEOP_ARITH2(evorc); -GEN_SPEOP_ARITH2(evnand); +static always_inline void gen_evand (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_and_i64(t0, t0, t1); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evandc (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_not_i64(t1, t1); + tcg_gen_and_i64(t0, t0, t1); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evxor (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_xor_i64(t0, t0, t1); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evor (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_or_i64(t0, t0, t1); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evnor (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_or_i64(t0, t0, t1); + tcg_gen_not_i64(t0, t0); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_eveqv (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_xor_i64(t0, t0, t1); + tcg_gen_not_i64(t0, t0); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evorc (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_not_i64(t1, t1); + tcg_gen_or_i64(t0, t0, t1); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +static always_inline void gen_evnand (DisasContext *ctx) +{ + if (unlikely(!ctx->spe_enabled)) { + GEN_EXCP_NO_AP(ctx); + return; + } + TCGv t0 = tcg_temp_local_new(TCG_TYPE_I64); + TCGv t1 = tcg_temp_local_new(TCG_TYPE_I64); + gen_load_gpr64(t0, rA(ctx->opcode)); + gen_load_gpr64(t1, rB(ctx->opcode)); + tcg_gen_and_i64(t0, t0, t1); + tcg_gen_not_i64(t0, t0); + gen_store_gpr64(rD(ctx->opcode), t0); + tcg_temp_free(t0); + tcg_temp_free(t1); +} + GEN_SPEOP_ARITH2(evsrwu); GEN_SPEOP_ARITH2(evsrws); GEN_SPEOP_ARITH2(evslw);