From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KppyR-0005At-MW for qemu-devel@nongnu.org; Tue, 14 Oct 2008 15:54:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KppyR-0005AZ-5x for qemu-devel@nongnu.org; Tue, 14 Oct 2008 15:54:31 -0400 Received: from [199.232.76.173] (port=46422 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KppyR-0005AW-2S for qemu-devel@nongnu.org; Tue, 14 Oct 2008 15:54:31 -0400 Received: from hall.aurel32.net ([88.191.82.174]:42259) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KppyQ-0001fw-EO for qemu-devel@nongnu.org; Tue, 14 Oct 2008 15:54:30 -0400 Date: Tue, 14 Oct 2008 21:54:29 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Add support for CPU_LOG_INT (MIPS targets) Message-ID: <20081014195429.GA28076@hall.aurel32.net> References: <48E5294A.8090209@mail.berlios.de> <20081014095802.GB13141@volta.aurel32.net> <48F4D60A.9050309@mail.berlios.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <48F4D60A.9050309@mail.berlios.de> Sender: Aurelien Jarno Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stefan Weil Cc: QEMU Developers On Tue, Oct 14, 2008 at 07:25:30PM +0200, Stefan Weil wrote: > Aurelien Jarno schrieb: > > On Thu, Oct 02, 2008 at 10:04:26PM +0200, Stefan Weil wrote: > > > > ... > >> Add interrupt logging for MIPS targets. > >> > >> Signed-off-by: Stefan Weil > >> > >> Index: hw/mips_int.c > >> =================================================================== > >> --- hw/mips_int.c (Revision 5400) > >> +++ hw/mips_int.c (Arbeitskopie) > >> @@ -1,6 +1,7 @@ > >> #include "hw.h" > >> #include "mips.h" > >> #include "cpu.h" > >> +#include "qemu-log.h" > >> > >> /* Raise IRQ to CPU if necessary. It must be called every time the active > >> IRQ may change */ > >> @@ -12,10 +13,28 @@ > >> !(env->hflags & MIPS_HFLAG_DM)) { > >> if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) && > >> !(env->interrupt_request & CPU_INTERRUPT_HARD)) { > >> + if (loglevel & CPU_LOG_INT) { > >> + fprintf(logfile, "%s: cpu_interrupt (0x%08x,0x%08x)\n", __func__, > >> + env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask, > >> + env->interrupt_request); > >> + cpu_dump_state(env, logfile, fprintf, 0); > >> + } > >> cpu_interrupt(env, CPU_INTERRUPT_HARD); > >> - } > >> - } else > >> + } else { > >> + if (loglevel & CPU_LOG_INT) { > >> + fprintf(logfile, "%s: no interrupt (0x%08x,0x%08x)\n", __func__, > >> + env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask, > >> + env->interrupt_request); > >> + cpu_dump_state(env, logfile, fprintf, 0); > >> + } > >> > > > > I am not sure we really want to log this case, as no interrupt are > > actually triggered (disabled interrupt, already processing an > > interrupt, etc.) > > > Well, I added this code to debug a real problem, not just for fun. > It helps to see who triggers this code, even when interrupts are > disabled at that moment. > Then if you want to see the interrupts in all cases, what about adding it directly to cpu_mips_irq_request()? The resulting code would be cleaner. -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net