From: Nathan Froyd <froydnj@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH][ppc] reorganize register set for SPE + TCG
Date: Wed, 15 Oct 2008 08:20:56 -0700 [thread overview]
Message-ID: <20081015152054.GO18389@codesourcery.com> (raw)
In-Reply-To: <20081015142237.GN18389@codesourcery.com>
On Wed, Oct 15, 2008 at 07:22:38AM -0700, Nathan Froyd wrote:
> The (large, invasive) patch below is a preparation patch for converting
> (most) SPE instructions to use TCG. The rationale is that your ordinary
> SPE instruction deals with three 64-bit quantaties (and a potential
> 64-bit accumulator). In the current implementation, it's extremely
> laborious/difficult to pass those 64-bit quantaties to helpers, since
> the high/low words for SPE registers are not contiguous in the
> environment. (TCG helpers for SPE instructions are not yet implemented,
> but they will be necessary as part of the total conversion to TCG.)
I should clarify here that I meant passing pointers to the 64-bit
quantities; Paul pointed out to me that passing 64-bit arguments
obviously works, since you can emulate 64-bit targets on a 32-bit host.
I thought I would need to pass pointers to 64-bit quantities since
that's how, e.g., MMX helpers work, but that may not be the best example
of how TCG is supposed to be used.
I still like my patch for exposing the halves of the registers directly
and thereby opening up more efficient translation of some things, but it
appears that there are better ways to do what I want to do.
-Nathan
next prev parent reply other threads:[~2008-10-15 15:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-15 14:22 [Qemu-devel] [PATCH][ppc] reorganize register set for SPE + TCG Nathan Froyd
2008-10-15 15:20 ` Nathan Froyd [this message]
2008-10-15 15:25 ` Paul Brook
2008-10-15 16:11 ` Aurelien Jarno
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