From: Paul Brook <paul@codesourcery.com>
To: Vladimir Prus <vladimir@codesourcery.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco
Date: Mon, 20 Oct 2008 17:46:42 +0100 [thread overview]
Message-ID: <200810201746.43167.paul@codesourcery.com> (raw)
In-Reply-To: <200810202031.19287.vladimir@codesourcery.com>
> > The only cpu we currently claim to support is SH4. When adding support
> > for other cores these should be properly conditionalized.
> > Unconditionally implementing additional instructions is a regression. I
> > don't consider "we'll fix this at some undefined point in the future" to
> > be a good enough answer.
>
> Can you outline what changes should I make to implement proper
> conditionalization?
You probably want something like ARM arm_feature, MIPS check_insn or
SPARC CHECK_*_FEATURE.
Paul
next prev parent reply other threads:[~2008-10-20 16:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-17 12:52 [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco Vladimir Prus
2008-10-17 19:56 ` Paul Brook
2008-10-20 4:01 ` Paul Mundt
2008-10-20 10:54 ` Paul Brook
2008-10-20 13:00 ` Paul Mundt
2008-10-20 16:27 ` Paul Brook
2008-10-20 16:31 ` Vladimir Prus
2008-10-20 16:46 ` Paul Brook [this message]
2008-10-20 16:49 ` Paul Mundt
2008-10-20 17:07 ` Paul Brook
2008-10-20 17:15 ` Laurent Desnogues
2008-10-20 17:19 ` Paul Brook
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