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From: Vince Weaver <vince@csl.cornell.edu>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] Fix Alpha ret instruction
Date: Wed, 5 Nov 2008 17:07:41 -0500 (EST)	[thread overview]
Message-ID: <20081105170355.E80362@stanley.csl.cornell.edu> (raw)


Hopefully pine doesn't corrupt this patch, I've had problems recently.

For an alpha "ret" instruction, of the type
     ret $26

The return was being ignored.  This is because in translate.c
register $26 (the return address) was being over-written with the current 
PC before it could be jumped to.  Thus the ret was ignored.

This patch just re-orders things so the return address is processed before 
it is over-written with the current PC.



Index: target-alpha/translate.c
===================================================================
--- target-alpha/translate.c	(revision 5636)
+++ target-alpha/translate.c	(working copy)
@@ -1634,12 +1634,13 @@
          break;
  #endif
      case 0x1A:
-        if (ra != 31)
-            tcg_gen_movi_i64(cpu_ir[ra], ctx->pc);
          if (rb != 31)
              tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3);
          else
              tcg_gen_movi_i64(cpu_pc, 0);
+        if (ra != 31)
+            tcg_gen_movi_i64(cpu_ir[ra], ctx->pc);
+
          /* Those four jumps only differ by the branch prediction hint */
          switch (fn2) {
          case 0x0:

             reply	other threads:[~2008-11-05 22:07 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-05 22:07 Vince Weaver [this message]
2008-11-06 10:41 ` [Qemu-devel] [PATCH] Fix Alpha ret instruction Aurelien Jarno

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