From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KxqXU-0002wq-Ni for qemu-devel@nongnu.org; Wed, 05 Nov 2008 17:07:48 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KxqXT-0002wP-EO for qemu-devel@nongnu.org; Wed, 05 Nov 2008 17:07:47 -0500 Received: from [199.232.76.173] (port=37607 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KxqXT-0002wH-Bd for qemu-devel@nongnu.org; Wed, 05 Nov 2008 17:07:47 -0500 Received: from csl.cornell.edu ([128.84.224.10]:3919 helo=vlsi.csl.cornell.edu) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KxqXS-00086N-TS for qemu-devel@nongnu.org; Wed, 05 Nov 2008 17:07:47 -0500 Received: from stanley.csl.cornell.edu (stanley.csl.cornell.edu [128.84.224.15]) by vlsi.csl.cornell.edu (8.13.4/8.13.4) with ESMTP id mA5M7fX3006069 for ; Wed, 5 Nov 2008 17:07:46 -0500 (EST) Date: Wed, 5 Nov 2008 17:07:41 -0500 (EST) From: Vince Weaver Message-ID: <20081105170355.E80362@stanley.csl.cornell.edu> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Subject: [Qemu-devel] [PATCH] Fix Alpha ret instruction Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hopefully pine doesn't corrupt this patch, I've had problems recently. For an alpha "ret" instruction, of the type ret $26 The return was being ignored. This is because in translate.c register $26 (the return address) was being over-written with the current PC before it could be jumped to. Thus the ret was ignored. This patch just re-orders things so the return address is processed before it is over-written with the current PC. Index: target-alpha/translate.c =================================================================== --- target-alpha/translate.c (revision 5636) +++ target-alpha/translate.c (working copy) @@ -1634,12 +1634,13 @@ break; #endif case 0x1A: - if (ra != 31) - tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); if (rb != 31) tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3); else tcg_gen_movi_i64(cpu_pc, 0); + if (ra != 31) + tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); + /* Those four jumps only differ by the branch prediction hint */ switch (fn2) { case 0x0: