From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KzSoQ-0003MC-0r for qemu-devel@nongnu.org; Mon, 10 Nov 2008 04:11:58 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KzSoP-0003LM-0N for qemu-devel@nongnu.org; Mon, 10 Nov 2008 04:11:57 -0500 Received: from [199.232.76.173] (port=55378 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KzSoO-0003L1-8I for qemu-devel@nongnu.org; Mon, 10 Nov 2008 04:11:56 -0500 Received: from mx20.gnu.org ([199.232.41.8]:51240) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KzSoN-0001uC-Oy for qemu-devel@nongnu.org; Mon, 10 Nov 2008 04:11:56 -0500 Received: from mx2.redhat.com ([66.187.237.31]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KzSoM-0002vW-S8 for qemu-devel@nongnu.org; Mon, 10 Nov 2008 04:11:55 -0500 From: Gleb Natapov Date: Mon, 10 Nov 2008 11:11:59 +0200 Message-ID: <20081110091159.11822.26753.stgit@dhcp-1-237.local> In-Reply-To: <20081110091134.11822.34230.stgit@dhcp-1-237.local> References: <20081110091134.11822.34230.stgit@dhcp-1-237.local> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v3 5/6] Don't use unreserved memory in BIOS. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: bochs-developers@lists.sourceforge.net Cc: qemu-devel@nongnu.org Use only first page and last page of low memory. OSes assumes that first page is used by bios and last page is reserved in e820 map. Signed-off-by: Gleb Natapov --- bios/rombios.c | 11 +++++++---- bios/rombios.h | 1 - bios/rombios32.c | 11 ++++------- bios/rombios32start.S | 2 +- 4 files changed, 12 insertions(+), 13 deletions(-) diff --git a/bios/rombios.c b/bios/rombios.c index 630cfd2..c6c8b19 100644 --- a/bios/rombios.c +++ b/bios/rombios.c @@ -4547,7 +4547,7 @@ ASM_END { case 0: set_e820_range(ES, regs.u.r16.di, - 0x0000000L, 0x0009fc00L, 1); + 0x0000000L, 0x0009f000L, 1); regs.u.r32.ebx = 1; regs.u.r32.eax = 0x534D4150; regs.u.r32.ecx = 0x14; @@ -4556,7 +4556,7 @@ ASM_END break; case 1: set_e820_range(ES, regs.u.r16.di, - 0x0009fc00L, 0x000a0000L, 2); + 0x0009f000L, 0x000a0000L, 2); regs.u.r32.ebx = 2; regs.u.r32.eax = 0x534D4150; regs.u.r32.ecx = 0x14; @@ -10032,8 +10032,11 @@ rombios32_05: mov gs, ax cld - ;; init the stack pointer - mov esp, #0x00080000 + ;; init the stack pointer to point below EBDA + mov ax, [0x040e] + shl eax, #4 + mov esp, #-0x10 + add esp, eax ;; pass pointer to s3_resume_flag and s3_resume_vector to rombios32 push #0x04b0 diff --git a/bios/rombios.h b/bios/rombios.h index f0ed88e..b3df88b 100644 --- a/bios/rombios.h +++ b/bios/rombios.h @@ -56,7 +56,6 @@ #define ACPI_DATA_SIZE 0x00010000L #define PM_IO_BASE 0xb000 #define SMB_IO_BASE 0xb100 -#define CPU_COUNT_ADDR 0xf000 // Define the application NAME #if defined(BX_QEMU) diff --git a/bios/rombios32.c b/bios/rombios32.c index 53ae5e1..0c0ac90 100644 --- a/bios/rombios32.c +++ b/bios/rombios32.c @@ -57,7 +57,7 @@ typedef unsigned long long uint64_t; #define APIC_ENABLED 0x0100 -#define AP_BOOT_ADDR 0x10000 +#define AP_BOOT_ADDR 0x9f000 #define MPTABLE_MAX_SIZE 0x00002000 #define SMI_CMD_IO_ADDR 0xb2 @@ -392,7 +392,7 @@ void delay_ms(int n) } } -int smp_cpus; +uint16_t smp_cpus; uint32_t cpuid_signature; uint32_t cpuid_features; uint32_t cpuid_ext_features; @@ -495,7 +495,7 @@ void smp_probe(void) { uint32_t val, sipi_vector; - smp_cpus = 1; + writew(&smp_cpus, 1); if (cpuid_features & CPUID_APIC) { /* enable local APIC */ @@ -503,7 +503,6 @@ void smp_probe(void) val |= APIC_ENABLED; writel(APIC_BASE + APIC_SVR, val); - writew((void *)CPU_COUNT_ADDR, 1); /* copy AP boot code */ memcpy((void *)AP_BOOT_ADDR, &smp_ap_boot_code_start, &smp_ap_boot_code_end - &smp_ap_boot_code_start); @@ -514,10 +513,8 @@ void smp_probe(void) writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector); delay_ms(10); - - smp_cpus = readw((void *)CPU_COUNT_ADDR); } - BX_INFO("Found %d cpu(s)\n", smp_cpus); + BX_INFO("Found %d cpu(s)\n", readw(&smp_cpus)); } /****************************************************/ diff --git a/bios/rombios32start.S b/bios/rombios32start.S index 1900261..836652c 100644 --- a/bios/rombios32start.S +++ b/bios/rombios32start.S @@ -49,7 +49,7 @@ _start: smp_ap_boot_code_start: xor %ax, %ax mov %ax, %ds - lock incw CPU_COUNT_ADDR + lock incw smp_cpus 1: hlt jmp 1b