[Qemu-devel] Add Siemens SX1 Machine support

[Qemu-devel] Add Siemens SX1 Machine support

[Jean-Christophe PLAGNIOL-VILLARD]

Hi,

	The folowing patchset add support for the Siemens SX1

	This work is based on the linux-on-SX1.sourceforge.net project

	Supported Machine

	Siemens SX1 Cellphone V1
	 - ARM OMAP310 processor
	 - SRAM                192 kB
	 - SDRAM                32 MB at 0x10000000
	 - Boot flash           16 MB at 0x00000000
	 - Application flash     8 MB at 0x04000000
	 - 3 serial ports
	 - 1 SecureDigital
	 - 1 LCD display
	 - 1 RTC
	 - 1 USB

	Siemens SX1 Cellphone V2
	 - ARM OMAP310 processor
	 - SRAM                192 kB
	 - SDRAM                32 MB at 0x10000000
	 - Boot flash           32 MB at 0x00000000
	 - 3 serial ports
	 - 1 SecureDigital
	 - 1 LCD display
	 - 1 RTC
	 - 1 USB

	U-Boot (mainline) and Linux kernel (2.6.26) tested

	For U-Boot in my next branch
	http://git.denx.de/?p=u-boot/u-boot-arm.git;a=shortlog;h=refs/heads/next

	Will be merge during merge window

Best Regards,
J.

[Qemu-devel] [PATCH 1/4] pflash_cfi01: add Single Byte Program

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 hw/pflash_cfi01.c |   87 ++++++++++++++++++++++++++++++++--------------------
 1 files changed, 53 insertions(+), 34 deletions(-)

diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 28abc16..f26684e 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -195,6 +195,47 @@ static void pflash_update(pflash_t *pfl, int offset,
     }
 }
 
+static void inline pflash_data_write(pflash_t *pfl, target_ulong offset,
+                          uint32_t value, int width)
+{
+    uint8_t *p = pfl->storage;
+
+    DPRINTF("%s: block write offset " TARGET_FMT_lx
+            " value %x counter " TARGET_FMT_lx "\n",
+            __func__, offset, value, pfl->counter);
+    switch (width) {
+    case 1:
+        p[offset] = value;
+        pflash_update(pfl, offset, 1);
+        break;
+    case 2:
+#if defined(TARGET_WORDS_BIGENDIAN)
+        p[offset] = value >> 8;
+        p[offset + 1] = value;
+#else
+        p[offset] = value;
+        p[offset + 1] = value >> 8;
+#endif
+        pflash_update(pfl, offset, 2);
+        break;
+    case 4:
+#if defined(TARGET_WORDS_BIGENDIAN)
+        p[offset] = value >> 24;
+        p[offset + 1] = value >> 16;
+        p[offset + 2] = value >> 8;
+        p[offset + 3] = value;
+#else
+        p[offset] = value;
+        p[offset + 1] = value >> 8;
+        p[offset + 2] = value >> 16;
+        p[offset + 3] = value >> 24;
+#endif
+        pflash_update(pfl, offset, 4);
+        break;
+    }
+
+}
+
 static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
                           int width)
 {
@@ -223,6 +264,10 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
         switch (cmd) {
         case 0x00: /* ??? */
             goto reset_flash;
+        case 0x10: /* Single Byte Program */
+        case 0x40: /* Single Byte Program */
+            DPRINTF(stderr, "%s: Single Byte Program\n", __func__);
+            break;
         case 0x20: /* Block erase */
             p = pfl->storage;
             offset &= ~(pfl->sector_len - 1);
@@ -264,6 +309,13 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
         return;
     case 1:
         switch (pfl->cmd) {
+        case 0x10: /* Single Byte Program */
+        case 0x40: /* Single Byte Program */
+            DPRINTF("%s: Single Byte Program\n", __func__);
+            pflash_data_write(pfl, offset, value, width);
+            pfl->status |= 0x80; /* Ready! */
+            pfl->wcycle = 0;
+        break;
         case 0x20: /* Block erase */
         case 0x28:
             if (cmd == 0xd0) { /* confirm */
@@ -308,40 +360,7 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
     case 2:
         switch (pfl->cmd) {
         case 0xe8: /* Block write */
-            p = pfl->storage;
-            DPRINTF("%s: block write offset " TARGET_FMT_lx
-                    " value %x counter " TARGET_FMT_lx "\n",
-                    __func__, offset, value, pfl->counter);
-            switch (width) {
-            case 1:
-                p[offset] = value;
-                pflash_update(pfl, offset, 1);
-                break;
-            case 2:
-#if defined(TARGET_WORDS_BIGENDIAN)
-                p[offset] = value >> 8;
-                p[offset + 1] = value;
-#else
-                p[offset] = value;
-                p[offset + 1] = value >> 8;
-#endif
-                pflash_update(pfl, offset, 2);
-                break;
-            case 4:
-#if defined(TARGET_WORDS_BIGENDIAN)
-                p[offset] = value >> 24;
-                p[offset + 1] = value >> 16;
-                p[offset + 2] = value >> 8;
-                p[offset + 3] = value;
-#else
-                p[offset] = value;
-                p[offset + 1] = value >> 8;
-                p[offset + 2] = value >> 16;
-                p[offset + 3] = value >> 24;
-#endif
-                pflash_update(pfl, offset, 4);
-                break;
-            }
+            pflash_data_write(pfl, offset, value, width);
 
             pfl->status |= 0x80;
 
-- 
1.5.6.5

[Qemu-devel] [PATCH 2/4] omap1: add OSC_12M_SEL Register support

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 hw/omap1.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/hw/omap1.c b/hw/omap1.c
index 0c3b5cd..45ee567 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2038,6 +2038,8 @@ static uint32_t omap_uart_read(void *opaque, target_phys_addr_t addr)
         return 0x0;
     case 0x48:	/* EBLR */
         return s->eblr;
+    case 0x4C:	/* OSC_12M_SEL */
+        return 0;
     case 0x50:	/* MVR */
         return 0x30;
     case 0x54:	/* SYSC */
@@ -2073,6 +2075,8 @@ static void omap_uart_write(void *opaque, target_phys_addr_t addr,
     case 0x48:	/* EBLR */
         s->eblr = value & 0xff;
         break;
+    case 0x4C:	/* OSC_12M_SEL */
+        break;
     case 0x44:	/* SSR */
     case 0x50:	/* MVR */
     case 0x58:	/* SYSS */
-- 
1.5.6.5

[Qemu-devel] [PATCH 3/4] omap1: fix uart3 init

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 hw/omap1.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/hw/omap1.c b/hw/omap1.c
index 45ee567..810fe2f 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -4778,7 +4778,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
                     omap_findclk(s, "uart2_ck"),
                     s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX],
                     serial_hds[0] ? serial_hds[1] : 0);
-    s->uart[2] = omap_uart_init(0xe1019800, s->irq[0][OMAP_INT_UART3],
+    s->uart[2] = omap_uart_init(0xfffb9800, s->irq[0][OMAP_INT_UART3],
                     omap_findclk(s, "uart3_ck"),
                     omap_findclk(s, "uart3_ck"),
                     s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX],
-- 
1.5.6.5

[Qemu-devel] [PATCH 4/4] add Siemens SX1 Machine support

[Jean-Christophe PLAGNIOL-VILLARD]

Siemens SX1 Cellphone V1
 - ARM OMAP310 processor
 - SRAM                192 kB
 - SDRAM                32 MB at 0x10000000
 - Boot flash           16 MB at 0x00000000
 - Application flash     8 MB at 0x04000000
 - 3 serial ports
 - 1 SecureDigital
 - 1 LCD display
 - 1 RTC
 - 1 USB

Siemens SX1 Cellphone V2
 - ARM OMAP310 processor
 - SRAM                192 kB
 - SDRAM                32 MB at 0x10000000
 - Boot flash           32 MB at 0x00000000
 - 3 serial ports
 - 1 SecureDigital
 - 1 LCD display
 - 1 RTC
 - 1 USB

U-Boot (mainline) and Linux kernel (2.6.26) tested

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 Makefile.target      |    2 +-
 hw/boards.h          |    4 +
 hw/omap_sx1.c        |  238 ++++++++++++++++++++++++++++++++++++++++++++++++++
 target-arm/machine.c |    2 +
 4 files changed, 245 insertions(+), 1 deletions(-)
 create mode 100644 hw/omap_sx1.c

diff --git a/Makefile.target b/Makefile.target
index a15cbe0..03db021 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -727,7 +727,7 @@ OBJS+= pflash_cfi01.o gumstix.o
 OBJS+= zaurus.o ide.o serial.o nand.o ecc.o spitz.o tosa.o tc6393xb.o
 OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o
 OBJS+= omap2.o omap_dss.o soc_dma.o
-OBJS+= palm.o tsc210x.o
+OBJS+= omap_sx1.o palm.o tsc210x.o
 OBJS+= nseries.o blizzard.o onenand.o vga.o cbus.o tusb6010.o usb-musb.o
 OBJS+= tsc2005.o bt-hci-csr.o
 OBJS+= mst_fpga.o mainstone.o
diff --git a/hw/boards.h b/hw/boards.h
index d30c0fc..a7b8126 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -86,6 +86,10 @@ extern QEMUMachine spitzpda_machine;
 extern QEMUMachine borzoipda_machine;
 extern QEMUMachine terrierpda_machine;
 
+/* omap_sx1.c */
+extern QEMUMachine sx1_machine_v1;
+extern QEMUMachine sx1_machine_v2;
+
 /* palm.c */
 extern QEMUMachine palmte_machine;
 
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
new file mode 100644
index 0000000..50e1e96
--- /dev/null
+++ b/hw/omap_sx1.c
@@ -0,0 +1,238 @@
+/* omap_sx1.c Support for the Siemens SX1 device
+ *
+ *   Copyright (C) 2008
+ * 	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *   Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
+ *
+ *   based on PalmOne's (TM) PDAs support (palm.c)
+ */
+
+/*
+ * PalmOne's (TM) PDAs.
+ *
+ * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include "hw.h"
+#include "sysemu.h"
+#include "console.h"
+#include "omap.h"
+#include "boards.h"
+#include "arm-misc.h"
+#include "flash.h"
+
+/*****************************************************************************/
+/* Siemens SX1 Cellphone V1 */
+/* - ARM OMAP310 processor
+ * - SRAM                192 kB
+ * - SDRAM                32 MB at 0x10000000
+ * - Boot flash           16 MB at 0x00000000
+ * - Application flash     8 MB at 0x04000000
+ * - 3 serial ports
+ * - 1 SecureDigital
+ * - 1 LCD display
+ * - 1 RTC
+ * - 1 USB
+ */
+
+/*****************************************************************************/
+/* Siemens SX1 Cellphone V2 */
+/* - ARM OMAP310 processor
+ * - SRAM                192 kB
+ * - SDRAM                32 MB at 0x10000000
+ * - Boot flash           32 MB at 0x00000000
+ * - 3 serial ports
+ * - 1 SecureDigital
+ * - 1 LCD display
+ * - 1 RTC
+ * - 1 USB
+ */
+
+static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 3) << 3);
+}
+
+static uint32_t static_readh(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 1) << 3);
+}
+
+static uint32_t static_readw(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 0) << 3);
+}
+
+static void static_write(void *opaque, target_phys_addr_t offset,
+                uint32_t value)
+{
+#ifdef SPY
+    printf("%s: value %08lx written at " PA_FMT "\n",
+                    __FUNCTION__, value, offset);
+#endif
+}
+
+static CPUReadMemoryFunc *static_readfn[] = {
+    static_readb,
+    static_readh,
+    static_readw,
+};
+
+static CPUWriteMemoryFunc *static_writefn[] = {
+    static_write,
+    static_write,
+    static_write,
+};
+
+#define sdram_size	0x02000000
+#define sector_size	(128 * 1024)
+#define flash0_size	(16 * 1024 * 1024)
+#define flash1_size	( 8 * 1024 * 1024)
+#define flash2_size	(32 * 1024 * 1024)
+#define total_ram_v1	(sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
+#define total_ram_v2	(sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
+
+static struct arm_boot_info sx1_binfo = {
+    .loader_start = OMAP_EMIFF_BASE,
+    .ram_size = sdram_size,
+    .board_id = 0x265,
+};
+
+static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model,
+                const int version)
+{
+    struct omap_mpu_state_s *cpu;
+    int io;
+    static uint32_t cs0val = 0x00213090;
+    static uint32_t cs1val = 0x00215070;
+    static uint32_t cs2val = 0x00001139;
+    static uint32_t cs3val = 0x00001139;
+    ram_addr_t phys_flash;
+    int index;
+    int fl_idx;
+    uint32_t flash_size = flash0_size;
+
+    if (version == 2) {
+        flash_size = flash2_size;
+    }
+
+    cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model);
+
+    /* External Flash (EMIFS) */
+    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
+                    (phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM);
+
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
+    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
+                    OMAP_CS0_SIZE - flash_size, io);
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
+    cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
+    cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
+
+    fl_idx = 0;
+
+    if ((index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
+        if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),
+            drives_table[index].bdrv, sector_size, flash_size / sector_size,
+            4, 0, 0, 0, 0)) {
+            fprintf(stderr, "qemu: Error registering flash memory %d.\n",
+                           fl_idx);
+	}
+        fl_idx++;
+    }
+
+    if ((version == 1) && (index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
+        cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
+                        (phys_flash = qemu_ram_alloc(flash1_size)) | IO_MEM_ROM);
+        io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
+        cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
+                        OMAP_CS1_SIZE - flash1_size, io);
+
+        if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),
+            drives_table[index].bdrv, sector_size, flash1_size / sector_size,
+            4, 0, 0, 0, 0)) {
+            fprintf(stderr, "qemu: Error registering flash memory %d.\n",
+                           fl_idx);
+	}
+        fl_idx++;
+    } else {
+        io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
+        cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
+    }
+
+    if (!kernel_filename && !fl_idx) {
+        fprintf(stderr, "Kernel or Flash image must be specified\n");
+        exit(1);
+    }
+
+    /* Load the kernel.  */
+    if (kernel_filename) {
+        /* Start at bootloader.  */
+        cpu->env->regs[15] = sx1_binfo.loader_start;
+
+        sx1_binfo.kernel_filename = kernel_filename;
+        sx1_binfo.kernel_cmdline = kernel_cmdline;
+        sx1_binfo.initrd_filename = initrd_filename;
+        arm_load_kernel(cpu->env, &sx1_binfo);
+    } else {
+            cpu->env->regs[15] = 0x00000000;
+    }
+
+    dpy_resize(ds, 640, 480);
+}
+
+static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model)
+{
+	sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
+                kernel_cmdline, initrd_filename, cpu_model, 1);
+}
+
+static void sx1_init_v2(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model)
+{
+	sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
+                kernel_cmdline, initrd_filename, cpu_model, 2);
+}
+
+QEMUMachine sx1_machine_v1 = {
+    .name = "sx1",
+    .desc = "Siemens SX1 (OMAP310) V2",
+    .init = sx1_init_v2,
+    .ram_require = total_ram_v2 | RAMSIZE_FIXED,
+};
+
+QEMUMachine sx1_machine_v2 = {
+    .name = "sx1-v1",
+    .desc = "Siemens SX1 (OMAP310) V1",
+    .init = sx1_init_v1,
+    .ram_require = total_ram_v1 | RAMSIZE_FIXED,
+};
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 42ff584..8f7d0c2 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -11,6 +11,8 @@ void register_machines(void)
     qemu_register_machine(&spitzpda_machine);
     qemu_register_machine(&borzoipda_machine);
     qemu_register_machine(&terrierpda_machine);
+    qemu_register_machine(&sx1_machine_v1);
+    qemu_register_machine(&sx1_machine_v2);
     qemu_register_machine(&palmte_machine);
     qemu_register_machine(&n800_machine);
     qemu_register_machine(&n810_machine);
-- 
1.5.6.5

[Qemu-devel] [PATCH 4/4 V2] add Siemens SX1 Machine support

[Jean-Christophe PLAGNIOL-VILLARD]

Siemens SX1 Cellphone V1
 - ARM OMAP310 processor
 - SRAM                192 kB
 - SDRAM                32 MB at 0x10000000
 - Boot flash           16 MB at 0x00000000
 - Application flash     8 MB at 0x04000000
 - 3 serial ports
 - 1 SecureDigital
 - 1 LCD display
 - 1 RTC

Siemens SX1 Cellphone V2
 - ARM OMAP310 processor
 - SRAM                192 kB
 - SDRAM                32 MB at 0x10000000
 - Boot flash           32 MB at 0x00000000
 - 3 serial ports
 - 1 SecureDigital
 - 1 LCD display
 - 1 RTC

U-Boot (mainline) and Linux kernel (2.6.26) tested

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
add qemu-doc
and fix QEMUMachine var name (invert between v1 and v2)

Best Regards,
J.
 Makefile.target      |    2 +-
 hw/boards.h          |    4 +
 hw/omap_sx1.c        |  236 ++++++++++++++++++++++++++++++++++++++++++++++++++
 qemu-doc.texi        |   26 ++++++
 target-arm/machine.c |    2 +
 5 files changed, 269 insertions(+), 1 deletions(-)
 create mode 100644 hw/omap_sx1.c

diff --git a/Makefile.target b/Makefile.target
index a15cbe0..03db021 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -727,7 +727,7 @@ OBJS+= pflash_cfi01.o gumstix.o
 OBJS+= zaurus.o ide.o serial.o nand.o ecc.o spitz.o tosa.o tc6393xb.o
 OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o
 OBJS+= omap2.o omap_dss.o soc_dma.o
-OBJS+= palm.o tsc210x.o
+OBJS+= omap_sx1.o palm.o tsc210x.o
 OBJS+= nseries.o blizzard.o onenand.o vga.o cbus.o tusb6010.o usb-musb.o
 OBJS+= tsc2005.o bt-hci-csr.o
 OBJS+= mst_fpga.o mainstone.o
diff --git a/hw/boards.h b/hw/boards.h
index d30c0fc..a7b8126 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -86,6 +86,10 @@ extern QEMUMachine spitzpda_machine;
 extern QEMUMachine borzoipda_machine;
 extern QEMUMachine terrierpda_machine;
 
+/* omap_sx1.c */
+extern QEMUMachine sx1_machine_v1;
+extern QEMUMachine sx1_machine_v2;
+
 /* palm.c */
 extern QEMUMachine palmte_machine;
 
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
new file mode 100644
index 0000000..e699549
--- /dev/null
+++ b/hw/omap_sx1.c
@@ -0,0 +1,236 @@
+/* omap_sx1.c Support for the Siemens SX1 device
+ *
+ *   Copyright (C) 2008
+ * 	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *   Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
+ *
+ *   based on PalmOne's (TM) PDAs support (palm.c)
+ */
+
+/*
+ * PalmOne's (TM) PDAs.
+ *
+ * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include "hw.h"
+#include "sysemu.h"
+#include "console.h"
+#include "omap.h"
+#include "boards.h"
+#include "arm-misc.h"
+#include "flash.h"
+
+/*****************************************************************************/
+/* Siemens SX1 Cellphone V1 */
+/* - ARM OMAP310 processor
+ * - SRAM                192 kB
+ * - SDRAM                32 MB at 0x10000000
+ * - Boot flash           16 MB at 0x00000000
+ * - Application flash     8 MB at 0x04000000
+ * - 3 serial ports
+ * - 1 SecureDigital
+ * - 1 LCD display
+ * - 1 RTC
+ */
+
+/*****************************************************************************/
+/* Siemens SX1 Cellphone V2 */
+/* - ARM OMAP310 processor
+ * - SRAM                192 kB
+ * - SDRAM                32 MB at 0x10000000
+ * - Boot flash           32 MB at 0x00000000
+ * - 3 serial ports
+ * - 1 SecureDigital
+ * - 1 LCD display
+ * - 1 RTC
+ */
+
+static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 3) << 3);
+}
+
+static uint32_t static_readh(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 1) << 3);
+}
+
+static uint32_t static_readw(void *opaque, target_phys_addr_t offset)
+{
+    uint32_t *val = (uint32_t *) opaque;
+
+    return *val >> ((offset & 0) << 3);
+}
+
+static void static_write(void *opaque, target_phys_addr_t offset,
+                uint32_t value)
+{
+#ifdef SPY
+    printf("%s: value %08lx written at " PA_FMT "\n",
+                    __FUNCTION__, value, offset);
+#endif
+}
+
+static CPUReadMemoryFunc *static_readfn[] = {
+    static_readb,
+    static_readh,
+    static_readw,
+};
+
+static CPUWriteMemoryFunc *static_writefn[] = {
+    static_write,
+    static_write,
+    static_write,
+};
+
+#define sdram_size	0x02000000
+#define sector_size	(128 * 1024)
+#define flash0_size	(16 * 1024 * 1024)
+#define flash1_size	( 8 * 1024 * 1024)
+#define flash2_size	(32 * 1024 * 1024)
+#define total_ram_v1	(sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
+#define total_ram_v2	(sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
+
+static struct arm_boot_info sx1_binfo = {
+    .loader_start = OMAP_EMIFF_BASE,
+    .ram_size = sdram_size,
+    .board_id = 0x265,
+};
+
+static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model,
+                const int version)
+{
+    struct omap_mpu_state_s *cpu;
+    int io;
+    static uint32_t cs0val = 0x00213090;
+    static uint32_t cs1val = 0x00215070;
+    static uint32_t cs2val = 0x00001139;
+    static uint32_t cs3val = 0x00001139;
+    ram_addr_t phys_flash;
+    int index;
+    int fl_idx;
+    uint32_t flash_size = flash0_size;
+
+    if (version == 2) {
+        flash_size = flash2_size;
+    }
+
+    cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model);
+
+    /* External Flash (EMIFS) */
+    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
+                    (phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM);
+
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
+    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
+                    OMAP_CS0_SIZE - flash_size, io);
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
+    cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
+    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
+    cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
+
+    fl_idx = 0;
+
+    if ((index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
+        if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),
+            drives_table[index].bdrv, sector_size, flash_size / sector_size,
+            4, 0, 0, 0, 0)) {
+            fprintf(stderr, "qemu: Error registering flash memory %d.\n",
+                           fl_idx);
+	}
+        fl_idx++;
+    }
+
+    if ((version == 1) && (index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
+        cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
+                        (phys_flash = qemu_ram_alloc(flash1_size)) | IO_MEM_ROM);
+        io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
+        cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
+                        OMAP_CS1_SIZE - flash1_size, io);
+
+        if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),
+            drives_table[index].bdrv, sector_size, flash1_size / sector_size,
+            4, 0, 0, 0, 0)) {
+            fprintf(stderr, "qemu: Error registering flash memory %d.\n",
+                           fl_idx);
+	}
+        fl_idx++;
+    } else {
+        io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
+        cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
+    }
+
+    if (!kernel_filename && !fl_idx) {
+        fprintf(stderr, "Kernel or Flash image must be specified\n");
+        exit(1);
+    }
+
+    /* Load the kernel.  */
+    if (kernel_filename) {
+        /* Start at bootloader.  */
+        cpu->env->regs[15] = sx1_binfo.loader_start;
+
+        sx1_binfo.kernel_filename = kernel_filename;
+        sx1_binfo.kernel_cmdline = kernel_cmdline;
+        sx1_binfo.initrd_filename = initrd_filename;
+        arm_load_kernel(cpu->env, &sx1_binfo);
+    } else {
+            cpu->env->regs[15] = 0x00000000;
+    }
+
+    dpy_resize(ds, 640, 480);
+}
+
+static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model)
+{
+	sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
+                kernel_cmdline, initrd_filename, cpu_model, 1);
+}
+
+static void sx1_init_v2(ram_addr_t ram_size, int vga_ram_size,
+                const char *boot_device, DisplayState *ds,
+                const char *kernel_filename, const char *kernel_cmdline,
+                const char *initrd_filename, const char *cpu_model)
+{
+	sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
+                kernel_cmdline, initrd_filename, cpu_model, 2);
+}
+
+QEMUMachine sx1_machine_v2 = {
+    .name = "sx1",
+    .desc = "Siemens SX1 (OMAP310) V2",
+    .init = sx1_init_v2,
+    .ram_require = total_ram_v2 | RAMSIZE_FIXED,
+};
+
+QEMUMachine sx1_machine_v1 = {
+    .name = "sx1-v1",
+    .desc = "Siemens SX1 (OMAP310) V1",
+    .init = sx1_init_v1,
+    .ram_require = total_ram_v1 | RAMSIZE_FIXED,
+};
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 1735d92..9ed89f7 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -2707,6 +2707,32 @@ Secure Digital card connected to OMAP MMC/SD host
 Three on-chip UARTs
 @end itemize
 
+The Siemens SX1 models v1 and v2 (default) emulation with U-Boot and Linux
+Mainline support.
+The emlulaton includes the following elements:
+
+@itemize @minus
+@item
+Texas Instruments OMAP310 System-on-chip (ARM 925T core)
+@item
+ROM and RAM memories (ROM firmware image can be loaded with -pflash)
+V1
+1 Flash of 16MB and 1 Flash of 8MB
+V2
+1 Flash of 32MB
+@item
+On-chip LCD controller
+@item
+On-chip Real Time Clock
+@item
+TI TSC2102i touchscreen controller / analog-digital converter / Audio
+CODEC, connected through MicroWire and I@math{^2}S busses
+@item
+Secure Digital card connected to OMAP MMC/SD host
+@item
+Three on-chip UARTs
+@end itemize
+
 Nokia N800 and N810 internet tablets (known also as RX-34 and RX-44 / 48)
 emulation supports the following elements:
 
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 42ff584..8f7d0c2 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -11,6 +11,8 @@ void register_machines(void)
     qemu_register_machine(&spitzpda_machine);
     qemu_register_machine(&borzoipda_machine);
     qemu_register_machine(&terrierpda_machine);
+    qemu_register_machine(&sx1_machine_v1);
+    qemu_register_machine(&sx1_machine_v2);
     qemu_register_machine(&palmte_machine);
     qemu_register_machine(&n800_machine);
     qemu_register_machine(&n810_machine);
-- 
1.5.6.5