From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L2ZLc-0002id-C4 for qemu-devel@nongnu.org; Tue, 18 Nov 2008 17:47:04 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L2ZLX-0002fT-Pt for qemu-devel@nongnu.org; Tue, 18 Nov 2008 17:47:03 -0500 Received: from [199.232.76.173] (port=36799 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L2ZLX-0002fO-7n for qemu-devel@nongnu.org; Tue, 18 Nov 2008 17:46:59 -0500 Received: from mail.codesourcery.com ([65.74.133.4]:34032) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L2ZLW-0005Nc-Vn for qemu-devel@nongnu.org; Tue, 18 Nov 2008 17:46:59 -0500 From: Paul Brook Subject: Re: [Qemu-devel] Re: [PATCH v5 18/18] gdbstub: x86: Switch 64/32 bit registers dynamically Date: Tue, 18 Nov 2008 22:46:54 +0000 References: <20081117161857.26880.45423.stgit@mchn012c.ww002.siemens.net> <49233776.9050504@codemonkey.ws> <492343C2.8080604@web.de> In-Reply-To: <492343C2.8080604@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200811182246.54653.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Jan Kiszka > The best approach, definitely, would be to teach GDB how to switch the > disassembler mode depending on the thread's (or VCPUs) state. But so > there is neither a mechanism in GDB for this, nor is GDB even aware of > the x86 modes (no tracking of privileged registers). We have some > preliminary patches for this, but they are still far away from GDB > mainline. I'm pretty sure all the infrastructure is there. gdb is able to natively debug 32-bit binaries on a 64-bit host and is able to switch disassembler modes for ARM vs. Thumb. Paul