[Qemu-devel] [RESEND][PATCH] Fix memory-mapped i8042 on MIPS Magnum

[Qemu-devel] [RESEND][PATCH] Fix memory-mapped i8042 on MIPS Magnum

[Hervé Poussineau]

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Hi,

Current implementation of memory-mapped i8042 controller is atm 
implemented with an interface shift (it_shift) parameter, like most all 
memory-mapped devices in Qemu.
However, this isn't suitable for MIPS Magnum, where i8042 controller is 
at 0x80005000 up to 0x80005fff.

Thomas Bogendoerfer (from #mipslinux) tested the behaviour of a real 
machine, and found that odd addresses are for status/command register, 
and even addresses for data register.

Attached patch implements this behaviour by replacing the it_shift 
parameter by a mask one.
Incidentally, keyboard now works on OpenBSD 2.3, which accesses i8042 
controller at 0x80005060 and 0x80005061.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>

Changes since v1:
- updated to qemu svn

Hervé

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Re: [Qemu-devel] [RESEND][PATCH] Fix memory-mapped i8042 on MIPS Magnum

[Aurelien Jarno]

On Sun, Dec 07, 2008 at 09:58:42PM +0100, Hervé Poussineau wrote:
> Hi,
Hi!

> Current implementation of memory-mapped i8042 controller is atm  
> implemented with an interface shift (it_shift) parameter, like most all  
> memory-mapped devices in Qemu.
> However, this isn't suitable for MIPS Magnum, where i8042 controller is  
> at 0x80005000 up to 0x80005fff.
>
> Thomas Bogendoerfer (from #mipslinux) tested the behaviour of a real  
> machine, and found that odd addresses are for status/command register,  
> and even addresses for data register.
>
> Attached patch implements this behaviour by replacing the it_shift  
> parameter by a mask one.
> Incidentally, keyboard now works on OpenBSD 2.3, which accesses i8042  
> controller at 0x80005060 and 0x80005061.
>
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
>
> Changes since v1:
> - updated to qemu svn

It looks basically ok, except that the size and the address should be
of type target_phys_addr_t instead of ram_addr_t.

Aurelien

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