From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L9i2a-0000QK-W7 for qemu-devel@nongnu.org; Mon, 08 Dec 2008 10:28:57 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L9i2Z-0000Q4-Sn for qemu-devel@nongnu.org; Mon, 08 Dec 2008 10:28:56 -0500 Received: from [199.232.76.173] (port=53569 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L9i2Z-0000Q1-Q7 for qemu-devel@nongnu.org; Mon, 08 Dec 2008 10:28:55 -0500 Received: from hall.aurel32.net ([88.191.82.174]:48362) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L9i2Z-0000tV-HH for qemu-devel@nongnu.org; Mon, 08 Dec 2008 10:28:55 -0500 Received: from volta.aurel32.net ([2002:52e8:2fb:1:21e:8cff:feb0:693b]) by hall.aurel32.net with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1L9i2V-0004hw-1U for qemu-devel@nongnu.org; Mon, 08 Dec 2008 16:28:51 +0100 Received: from aurel32 by volta.aurel32.net with local (Exim 4.69) (envelope-from ) id 1L9i2U-0006Tw-4x for qemu-devel@nongnu.org; Mon, 08 Dec 2008 16:28:50 +0100 Date: Mon, 8 Dec 2008 16:28:50 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [RESEND][PATCH] Fix memory-mapped i8042 on MIPS Magnum Message-ID: <20081208152850.GA14780@volta.aurel32.net> References: <493C3902.4010105@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <493C3902.4010105@reactos.org> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sun, Dec 07, 2008 at 09:58:42PM +0100, Hervé Poussineau wrote: > Hi, Hi! > Current implementation of memory-mapped i8042 controller is atm > implemented with an interface shift (it_shift) parameter, like most all > memory-mapped devices in Qemu. > However, this isn't suitable for MIPS Magnum, where i8042 controller is > at 0x80005000 up to 0x80005fff. > > Thomas Bogendoerfer (from #mipslinux) tested the behaviour of a real > machine, and found that odd addresses are for status/command register, > and even addresses for data register. > > Attached patch implements this behaviour by replacing the it_shift > parameter by a mask one. > Incidentally, keyboard now works on OpenBSD 2.3, which accesses i8042 > controller at 0x80005060 and 0x80005061. > > Signed-off-by: Hervé Poussineau > > Changes since v1: > - updated to qemu svn It looks basically ok, except that the size and the address should be of type target_phys_addr_t instead of ram_addr_t. Aurelien -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net