From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L9peb-0007GX-IH for qemu-devel@nongnu.org; Mon, 08 Dec 2008 18:36:41 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L9peZ-0007GL-5L for qemu-devel@nongnu.org; Mon, 08 Dec 2008 18:36:40 -0500 Received: from [199.232.76.173] (port=47276 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L9peY-0007GI-VR for qemu-devel@nongnu.org; Mon, 08 Dec 2008 18:36:39 -0500 Received: from mx20.gnu.org ([199.232.41.8]:22626) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L9peY-0005P4-GF for qemu-devel@nongnu.org; Mon, 08 Dec 2008 18:36:38 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1L9peW-00045S-R8 for qemu-devel@nongnu.org; Mon, 08 Dec 2008 18:36:37 -0500 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH 3/4] LSI53C895A: Implement TARGET RESET message Date: Mon, 8 Dec 2008 23:36:33 +0000 References: <1228759670-31113-1-git-send-email-ryanh@us.ibm.com> <200812081838.23464.paul@codesourcery.com> <20081208185827.GL13481@us.ibm.com> In-Reply-To: <20081208185827.GL13481@us.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200812082336.34006.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Ryan Harper , kvm@vger.kernel.org > Which I figured was because lsi_soft_reset doesn't initialize > current_dma_len. I added current_dma_len to soft_reset and now we can > probe with out failing, and existing partitions on the device show up, > but any further use of the device results in broken behavior. >... > Because the driver is issueing bus resets, we're clobbering the scratch > registers. In that case I'm still very suspicious of your parch. Why are you clearing some of the scratch registers? It sounds like you need to separate a bus reset from a hard reset. Paul