[Qemu-devel] 4xx TLB fixes

[Qemu-devel] 4xx TLB fixes

[Andrew May]

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I don't all the details of the 4xx MMU stuff, but I think these 2 fixes
for the tlb handling are correct.

One is to ignore the Little endian bit if the page isn't valid. The
linux code reuses the registers when it invalidates a mapping. So any
invalidate of mappings 32-63, would trigger the abort.

The 2nd fix is to handle a change of a mapping from read-only to
read-write. I think the invalid is needed after this, but I am not sure.

With these my kernel boots, and starts to run userspace. But there it
doesn't finish running init. But my userspace FS may not be correct.

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diff --git a/trunk/target-ppc/op_helper.c b/trunk/target-ppc/op_helper.c
--- a/trunk/target-ppc/op_helper.c
+++ b/trunk/target-ppc/op_helper.c
@@ -2806,7 +2806,7 @@ void do_4xx_tlbwe_hi (void)
         tlb->prot |= PAGE_VALID;
     else
         tlb->prot &= ~PAGE_VALID;
-    if (T1 & 0x20) {
+    if (T1 & 0x40 && T1 & 0x20) {
         /* XXX: TO BE FIXED */
         cpu_abort(env, "Little-endian TLB entries are not supported by now\n");
     }
@@ -2849,11 +2849,20 @@ void do_4xx_tlbwe_lo (void)
     T0 &= 0x3F;
     tlb = &env->tlb[T0].tlbe;
     tlb->RPN = T1 & 0xFFFFFC00;
-    tlb->prot = PAGE_READ;
+    tlb->prot &= ~(PAGE_EXEC | PAGE_WRITE);
+    tlb->prot |= PAGE_READ;
     if (T1 & 0x200)
         tlb->prot |= PAGE_EXEC;
     if (T1 & 0x100)
         tlb->prot |= PAGE_WRITE;
+
+    /* If the page is valid flush it for the prot change */
+    if (tlb->prot & PAGE_VALID) {
+            target_ulong page, end;
+        end = tlb->EPN + tlb->size;
+        for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
+            tlb_flush_page(env, page);
+    }
 #if defined (DEBUG_SOFTWARE_TLB)
     if (loglevel != 0) {
         fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX

Re: [Qemu-devel] 4xx TLB fixes

[Andreas Färber]

Am 08.12.2008 um 09:17 schrieb Andrew May:

> I don't all the details of the 4xx MMU stuff, but I think these 2  
> fixes
> for the tlb handling are correct.
>
> One is to ignore the Little endian bit if the page isn't valid. The
> linux code reuses the registers when it invalidates a mapping. So any
> invalidate of mappings 32-63, would trigger the abort.
>
> The 2nd fix is to handle a change of a mapping from read-only to
> read-write. I think the invalid is needed after this, but I am not  
> sure.
>
> With these my kernel boots, and starts to run userspace. But there it
> doesn't finish running init. But my userspace FS may not be  
> correct.<4xx_tlb.patch>

You sure the patch is up-to-date?
T0 and T1 looks like dyngen code, whereas the conversion to TCG was  
completed the weekend.

Andreas

[Qemu-devel] Re: 4xx TLB fixes

[Andrew May]

On Mon, 8 Dec 2008 00:17:35 -0800
Andrew May <acmay@acmay.homeip.net> wrote:

> I don't all the details of the 4xx MMU stuff, but I think these 2
> fixes for the tlb handling are correct.

No the patch isn't up to date. But I just tried to merge it and things
have gone backwards for me.
And I am kicking myself for not saving off logs to compare how things
are going wrong.

It seems that inside linux "setup_arg_pages()" calls
"move_page_tables()".
And when the code tries to return back to setup_arg_pages(), it fails
to find the kernel code that was just there.
The get_phys_addr_code() does a cpu_abort there, but I don't see that
the MMU code is being checked there.

I haven't been able to debug it too much more.

ps: I am not on the list so, please cc me.