From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LBZrE-00068B-Db for qemu-devel@nongnu.org; Sat, 13 Dec 2008 14:08:56 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LBZrC-00067w-NZ for qemu-devel@nongnu.org; Sat, 13 Dec 2008 14:08:55 -0500 Received: from [199.232.76.173] (port=47476 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LBZrC-00067t-IH for qemu-devel@nongnu.org; Sat, 13 Dec 2008 14:08:54 -0500 Received: from mx20.gnu.org ([199.232.41.8]:65163) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LBZrC-0004Wv-5y for qemu-devel@nongnu.org; Sat, 13 Dec 2008 14:08:54 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LBZr9-00017C-Uc for qemu-devel@nongnu.org; Sat, 13 Dec 2008 14:08:52 -0500 Date: Sat, 13 Dec 2008 11:08:49 -0800 From: Nathan Froyd Message-ID: <20081213190849.GA23471@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH] target-ppc: add integer Altivec instructions Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This patch series adds support for integer Altivec instructions to QEMU, including element-wise loads and stores. It's rather long (42 individual patches), so to avoid patch-bombing the list, I've placed the patch series at: http://www.method-combination.net/qemu/altivec-patches/ For easier viewing of the whole series, there's also one comprehensive patch: http://www.method-combination.net/qemu/altivec-patches/0000-BIG-PATCH.patch diffstat says: target-ppc/cpu.h | 10 + target-ppc/helper.h | 127 +++++++ target-ppc/op_helper.c | 862 ++++++++++++++++++++++++++++++++++++++++++++++++ target-ppc/translate.c | 416 +++++++++++++++++++++++ 4 files changed, 1415 insertions(+), 0 deletions(-) Why only the integer instructions? I originally wrote support for the whole instruction set, but I did it in the days of dyngen. So a straight forward-port was out of the question. The original patch also sloppily used native float, rather than float32, and used C99 math functions to implement some of the more exotic Altivec instructions. Both of these decisions mean that some care has to be taken in porting the floating-point instructions. I figured it'd be better to push out the integer instructions now and the floating-point instructions later, rather than waiting for some unspecified time for full support. (After all, target-ppc has done just fine with only {l,st}vx{,l}, almost anything additional is an improvement!) Comments and/or commits on my behalf welcome. :) -Nathan