[Qemu-devel] [PATCH] Fix type of spe_acc.

[Qemu-devel] [PATCH] Fix type of spe_acc.

[Nathan Froyd]

ACC is a 64-bit register and needs to be specified as such regardless of
the target.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
---
 target-ppc/cpu.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5bfa4a0..113bba5 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -609,7 +609,7 @@ struct CPUPPCState {
     ppc_avr_t avr[32];
     uint32_t vscr;
     /* SPE registers */
-    target_ulong spe_acc;
+    uint64_t spe_acc;
     float_status spe_status;
     uint32_t spe_fscr;
 
-- 
1.6.0.5

Re: [Qemu-devel] [PATCH] Fix type of spe_acc.

[Aurelien Jarno]

On Tue, Dec 16, 2008 at 12:32:42PM -0800, Nathan Froyd wrote:
> ACC is a 64-bit register and needs to be specified as such regardless of
> the target.
> 
> Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>

Thanks, applied.

> ---
>  target-ppc/cpu.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 5bfa4a0..113bba5 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -609,7 +609,7 @@ struct CPUPPCState {
>      ppc_avr_t avr[32];
>      uint32_t vscr;
>      /* SPE registers */
> -    target_ulong spe_acc;
> +    uint64_t spe_acc;
>      float_status spe_status;
>      uint32_t spe_fscr;
>  
> -- 
> 1.6.0.5
> 
> 
> 
> 

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