From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LKaVY-0005Ly-5A for qemu-devel@nongnu.org; Wed, 07 Jan 2009 10:39:48 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LKaVW-0005Lm-Qq for qemu-devel@nongnu.org; Wed, 07 Jan 2009 10:39:47 -0500 Received: from [199.232.76.173] (port=57232 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LKaVW-0005Lj-KY for qemu-devel@nongnu.org; Wed, 07 Jan 2009 10:39:46 -0500 Received: from bart.se.axis.com ([195.60.68.10]:55540) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LKaVW-0000NO-3c for qemu-devel@nongnu.org; Wed, 07 Jan 2009 10:39:46 -0500 Received: from bart.se.axis.com (bart.se.axis.com [127.0.0.1]) by bart.se.axis.com (Postfix) with ESMTP id 9BD29640ED for ; Wed, 7 Jan 2009 16:39:39 +0100 (CET) Received: from axis.com (edgar.se.axis.com [10.93.151.1]) by bart.se.axis.com (Postfix) with ESMTP id 8502B640EB for ; Wed, 7 Jan 2009 16:39:39 +0100 (CET) Date: Wed, 7 Jan 2009 16:39:43 +0100 From: "Edgar E. Iglesias" Subject: Re: [Qemu-devel] MMIO address changes Message-ID: <20090107153943.GA28799@edgar.se.axis.com> References: <200812011859.35859.paul@codesourcery.com> <20081203121745.GI31803@edgar.se.axis.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20081203121745.GI31803@edgar.se.axis.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: paul@codesourcery.com Cc: qemu-devel@nongnu.org On Wed, Dec 03, 2008 at 01:17:45PM +0100, Edgar E. Iglesias wrote: > On Mon, Dec 01, 2008 at 06:59:35PM +0000, Paul Brook wrote: > > I've just committed a patch that changes the MMIO callback interface for > > devices. Instead of being passed an absolute address these are now passed an > > offset from the start[1] of the memory region that was registered. > > > > By itself this change has fairly neutral benefit, it just moves logic about. > > However it makes subsequent dynamic board configuration bits nicer, and is a > > step towards a proper bus level API. > > > > Most of the groundwork for this is already there, from my earlier changes to > > separate ram and MMIO addresses TLB handling. > > > > The main notable change it that the PhysPageDesc structure is not bigger. This > > isn't ideal, however l2_phys_map needs to go away anyway, so I'm not really > > worried about this. > > > > Some devices register their memory regions in multiple segments. To facilitate > > this I have added cpu_register_physical_memory_offset. > > > > Most of the remaining changes are fairly mechanical tweaks to fix devices that > > explicitly compensated for the absolute address. Many devices are untouched > > because they ignore the high bits of the address. > > > > I've tried to be fairly thorough with the changes, and tested what I can. > > However it's possible I missed or broke something, so please test your > > favourite targets. > > FWIW the etrax-fs machine works OK although I am seeing a noticeable slow-down > after the patch. I tracked this down and the MMIO patch was for some reason triggering a bug in the ETRAX models causing the slowdown. ETRAX ethernet/dma works fine again. Cheers