From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LQllU-0003Wm-VE for qemu-devel@nongnu.org; Sat, 24 Jan 2009 11:53:48 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LQllT-0003Wa-Tq for qemu-devel@nongnu.org; Sat, 24 Jan 2009 11:53:48 -0500 Received: from [199.232.76.173] (port=45630 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LQllT-0003WX-QM for qemu-devel@nongnu.org; Sat, 24 Jan 2009 11:53:47 -0500 Received: from mtaout03-winn.ispmail.ntl.com ([81.103.221.49]:54381) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LQllS-0005SW-Tu for qemu-devel@nongnu.org; Sat, 24 Jan 2009 11:53:47 -0500 Received: from aamtaout01-winn.ispmail.ntl.com ([81.103.221.35]) by mtaout03-winn.ispmail.ntl.com (InterMail vM.7.08.04.00 201-2186-134-20080326) with ESMTP id <20090124165345.WGRK7670.mtaout03-winn.ispmail.ntl.com@aamtaout01-winn.ispmail.ntl.com> for ; Sat, 24 Jan 2009 16:53:45 +0000 Received: from miranda.arrow ([213.107.23.205]) by aamtaout01-winn.ispmail.ntl.com (InterMail vG.2.02.00.01 201-2161-120-102-20060912) with ESMTP id <20090124165345.ZCPM19264.aamtaout01-winn.ispmail.ntl.com@miranda.arrow> for ; Sat, 24 Jan 2009 16:53:45 +0000 Received: from sdb by miranda.arrow with local (Exim 4.63) (envelope-from ) id 1LQllO-0007l6-S7 for qemu-devel@nongnu.org; Sat, 24 Jan 2009 16:53:43 +0000 Date: Sat, 24 Jan 2009 16:53:42 +0000 From: Stuart Brady Message-ID: <20090124165342.GA29800@miranda.arrow> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH] [v2] Define PCI vendor and device IDs in pci.h Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This patch defines PCI vendor and device IDs in pci.h (matching those from Linux's pci_ids.h), and uses those definitions where appropriate. Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id() accessors as suggested by Anthony Liguori. Signed-off-by: Stuart Brady Index: hw/cirrus_vga.c =================================================================== --- hw/cirrus_vga.c (revision 6428) +++ hw/cirrus_vga.c (working copy) @@ -173,8 +173,7 @@ #define CIRRUS_MMIO_LINEDRAW_MODE 0x39 // byte #define CIRRUS_MMIO_BLTSTATUS 0x40 // byte -// PCI 0x00: vendor, 0x02: device -#define PCI_VENDOR_CIRRUS 0x1013 +// PCI 0x02: device #define PCI_DEVICE_CLGD5462 0x00d0 #define PCI_DEVICE_CLGD5465 0x00d6 @@ -3376,10 +3375,8 @@ sizeof(PCICirrusVGAState), -1, NULL, pci_cirrus_write_config); pci_conf = d->dev.config; - pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff); - pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8); - pci_conf[0x02] = (uint8_t) (device_id & 0xff); - pci_conf[0x03] = (uint8_t) (device_id >> 8); + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CIRRUS); + pci_config_set_device_id(pci_conf, device_id); pci_conf[0x04] = PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS; pci_conf[0x0a] = PCI_CLASS_SUB_VGA; pci_conf[0x0b] = PCI_CLASS_BASE_DISPLAY; Index: hw/usb-uhci.c =================================================================== --- hw/usb-uhci.c (revision 6428) +++ hw/usb-uhci.c (working copy) @@ -1080,10 +1080,8 @@ "USB-UHCI", sizeof(UHCIState), devfn, NULL, NULL); pci_conf = s->dev.config; - pci_conf[0x00] = 0x86; - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x20; - pci_conf[0x03] = 0x70; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_2); pci_conf[0x08] = 0x01; // revision number pci_conf[0x09] = 0x00; pci_conf[0x0a] = 0x03; @@ -1117,10 +1115,8 @@ "USB-UHCI", sizeof(UHCIState), devfn, NULL, NULL); pci_conf = s->dev.config; - pci_conf[0x00] = 0x86; - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x12; - pci_conf[0x03] = 0x71; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_2); pci_conf[0x08] = 0x01; // revision number pci_conf[0x09] = 0x00; pci_conf[0x0a] = 0x03; Index: hw/sh_pci.c =================================================================== --- hw/sh_pci.c (revision 6428) +++ hw/sh_pci.c (working copy) @@ -191,10 +191,8 @@ cpu_register_physical_memory(p->iopbase, 0x40000, iop); cpu_register_physical_memory(p->membase, 0x1000000, mem); - p->dev->config[0x00] = 0x54; // HITACHI - p->dev->config[0x01] = 0x10; // - p->dev->config[0x02] = 0x0e; // SH7751R - p->dev->config[0x03] = 0x35; // + pci_config_set_vendor_id(p->dev->config, PCI_VENDOR_ID_HITACHI); + pci_config_set_device_id(p->dev->config, 0x350e); // SH7751R p->dev->config[0x04] = 0x80; p->dev->config[0x05] = 0x00; p->dev->config[0x06] = 0x90; Index: hw/pcnet.c =================================================================== --- hw/pcnet.c (revision 6428) +++ hw/pcnet.c (working copy) @@ -2000,8 +2000,8 @@ pci_conf = d->dev.config; - *(uint16_t *)&pci_conf[0x00] = cpu_to_le16(0x1022); - *(uint16_t *)&pci_conf[0x02] = cpu_to_le16(0x2000); + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AMD_LANCE); *(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007); *(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280); pci_conf[0x08] = 0x10; Index: hw/usb-ohci.c =================================================================== --- hw/usb-ohci.c (revision 6428) +++ hw/usb-ohci.c (working copy) @@ -1671,8 +1671,6 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn) { OHCIPCIState *ohci; - int vid = 0x106b; - int did = 0x003f; ohci = (OHCIPCIState *)pci_register_device(bus, "OHCI USB", sizeof(*ohci), devfn, NULL, NULL); @@ -1681,10 +1679,8 @@ return; } - ohci->pci_dev.config[0x00] = vid & 0xff; - ohci->pci_dev.config[0x01] = (vid >> 8) & 0xff; - ohci->pci_dev.config[0x02] = did & 0xff; - ohci->pci_dev.config[0x03] = (did >> 8) & 0xff; + pci_config_set_vendor_id(ohci->pci_dev.config, PCI_VENDOR_ID_APPLE); + pci_config_set_device_id(ohci->pci_dev.config, 0x003f); // device_id ohci->pci_dev.config[0x09] = 0x10; /* OHCI */ ohci->pci_dev.config[0x0a] = 0x3; ohci->pci_dev.config[0x0b] = 0xc; Index: hw/acpi.c =================================================================== --- hw/acpi.c (revision 6428) +++ hw/acpi.c (working copy) @@ -503,10 +503,8 @@ devfn, NULL, pm_write_config); pm_state = s; pci_conf = s->dev.config; - pci_conf[0x00] = 0x86; - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x13; - pci_conf[0x03] = 0x71; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3); pci_conf[0x06] = 0x80; pci_conf[0x07] = 0x02; pci_conf[0x08] = 0x03; // revision number Index: hw/apb_pci.c =================================================================== --- hw/apb_pci.c (revision 6428) +++ hw/apb_pci.c (working copy) @@ -252,10 +252,8 @@ d = pci_register_device(s->bus, "Advanced PCI Bus", sizeof(PCIDevice), 0, NULL, NULL); - d->config[0x00] = 0x8e; // vendor_id : Sun - d->config[0x01] = 0x10; - d->config[0x02] = 0x00; // device_id - d->config[0x03] = 0xa0; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_SUN); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_SUN_SABRE); d->config[0x04] = 0x06; // command = bus master, pci mem d->config[0x05] = 0x00; d->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error Index: hw/unin_pci.c =================================================================== --- hw/unin_pci.c (revision 6428) +++ hw/unin_pci.c (working copy) @@ -174,10 +174,8 @@ cpu_register_physical_memory(0xf2c00000, 0x1000, pci_mem_data); d = pci_register_device(s->bus, "Uni-north main", sizeof(PCIDevice), 11 << 3, NULL, NULL); - d->config[0x00] = 0x6b; // vendor_id : Apple - d->config[0x01] = 0x10; - d->config[0x02] = 0x1F; // device_id - d->config[0x03] = 0x00; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); + pci_config_set_device_id(d->config, 0x001f); // device_id d->config[0x08] = 0x00; // revision d->config[0x0A] = 0x00; // class_sub = pci host d->config[0x0B] = 0x06; // class_base = PCI_bridge @@ -190,10 +188,8 @@ /* pci-to-pci bridge */ d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3, NULL, NULL); - d->config[0x00] = 0x11; // vendor_id : TI - d->config[0x01] = 0x10; - d->config[0x02] = 0x26; // device_id - d->config[0x03] = 0x00; + pci_config_set_vendor_id(d->config, 0x1011); // vendor_id : TI + pci_config_set_device_id(d->config, 0x0026); // device_id d->config[0x08] = 0x05; // revision d->config[0x0A] = 0x04; // class_sub = pci2pci d->config[0x0B] = 0x06; // class_base = PCI_bridge @@ -229,10 +225,8 @@ d = pci_register_device("Uni-north AGP", sizeof(PCIDevice), 0, 11 << 3, NULL, NULL); - d->config[0x00] = 0x6b; // vendor_id : Apple - d->config[0x01] = 0x10; - d->config[0x02] = 0x20; // device_id - d->config[0x03] = 0x00; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP); d->config[0x08] = 0x00; // revision d->config[0x0A] = 0x00; // class_sub = pci host d->config[0x0B] = 0x06; // class_base = PCI_bridge @@ -254,10 +248,8 @@ d = pci_register_device("Uni-north internal", sizeof(PCIDevice), 3, 11 << 3, NULL, NULL); - d->config[0x00] = 0x6b; // vendor_id : Apple - d->config[0x01] = 0x10; - d->config[0x02] = 0x1E; // device_id - d->config[0x03] = 0x00; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); + pci_config_set_device_id(d->config, 0x001E); // device_id d->config[0x08] = 0x00; // revision d->config[0x0A] = 0x00; // class_sub = pci host d->config[0x0B] = 0x06; // class_base = PCI_bridge Index: hw/vmware_vga.c =================================================================== --- hw/vmware_vga.c (revision 6428) +++ hw/vmware_vga.c (working copy) @@ -1204,12 +1204,6 @@ iomemtype); } -#define PCI_VENDOR_ID_VMWARE 0x15ad -#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 -#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 -#define PCI_DEVICE_ID_VMWARE_NET 0x0720 -#define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 -#define PCI_DEVICE_ID_VMWARE_IDE 0x1729 #define PCI_CLASS_BASE_DISPLAY 0x03 #define PCI_CLASS_SUB_VGA 0x00 #define PCI_CLASS_HEADERTYPE_00h 0x00 @@ -1223,10 +1217,8 @@ s = (struct pci_vmsvga_state_s *) pci_register_device(bus, "QEMUware SVGA", sizeof(struct pci_vmsvga_state_s), -1, 0, 0); - s->card.config[PCI_VENDOR_ID] = PCI_VENDOR_ID_VMWARE & 0xff; - s->card.config[PCI_VENDOR_ID + 1] = PCI_VENDOR_ID_VMWARE >> 8; - s->card.config[PCI_DEVICE_ID] = SVGA_PCI_DEVICE_ID & 0xff; - s->card.config[PCI_DEVICE_ID + 1] = SVGA_PCI_DEVICE_ID >> 8; + pci_config_set_vendor_id(s->card.config, PCI_VENDOR_ID_VMWARE); + pci_config_set_device_id(s->card.config, SVGA_PCI_DEVICE_ID); s->card.config[PCI_COMMAND] = 0x07; /* I/O + Memory */ s->card.config[PCI_CLASS_DEVICE] = PCI_CLASS_SUB_VGA; s->card.config[0x0b] = PCI_CLASS_BASE_DISPLAY; Index: hw/grackle_pci.c =================================================================== --- hw/grackle_pci.c (revision 6428) +++ hw/grackle_pci.c (working copy) @@ -144,10 +144,8 @@ cpu_register_physical_memory(base + 0x00200000, 0x1000, pci_mem_data); d = pci_register_device(s->bus, "Grackle host bridge", sizeof(PCIDevice), 0, NULL, NULL); - d->config[0x00] = 0x57; // vendor_id - d->config[0x01] = 0x10; - d->config[0x02] = 0x02; // device_id - d->config[0x03] = 0x00; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106); d->config[0x08] = 0x00; // revision d->config[0x09] = 0x01; d->config[0x0a] = 0x00; // class_sub = host Index: hw/prep_pci.c =================================================================== --- hw/prep_pci.c (revision 6428) +++ hw/prep_pci.c (working copy) @@ -155,10 +155,8 @@ /* PCI host bridge */ d = pci_register_device(s->bus, "PREP Host Bridge - Motorola Raven", sizeof(PCIDevice), 0, NULL, NULL); - d->config[0x00] = 0x57; // vendor_id : Motorola - d->config[0x01] = 0x10; - d->config[0x02] = 0x01; // device_id : Raven - d->config[0x03] = 0x48; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_RAVEN); d->config[0x08] = 0x00; // revision d->config[0x0A] = 0x00; // class_sub = pci host d->config[0x0B] = 0x06; // class_base = PCI_bridge Index: hw/ide.c =================================================================== --- hw/ide.c (revision 6428) +++ hw/ide.c (working copy) @@ -3342,10 +3342,8 @@ NULL, NULL); d->type = IDE_TYPE_CMD646; pci_conf = d->dev.config; - pci_conf[0x00] = 0x95; // CMD646 - pci_conf[0x01] = 0x10; - pci_conf[0x02] = 0x46; - pci_conf[0x03] = 0x06; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CMD); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_CMD_646); pci_conf[0x08] = 0x07; // IDE controller revision pci_conf[0x09] = 0x8f; @@ -3417,10 +3415,8 @@ d->type = IDE_TYPE_PIIX3; pci_conf = d->dev.config; - pci_conf[0x00] = 0x86; // Intel - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x10; - pci_conf[0x03] = 0x70; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_1); pci_conf[0x09] = 0x80; // legacy ATA mode pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage @@ -3456,10 +3452,8 @@ d->type = IDE_TYPE_PIIX4; pci_conf = d->dev.config; - pci_conf[0x00] = 0x86; // Intel - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x11; - pci_conf[0x03] = 0x71; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB); pci_conf[0x09] = 0x80; // legacy ATA mode pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage Index: hw/ac97.c =================================================================== --- hw/ac97.c (revision 6428) +++ hw/ac97.c (working copy) @@ -1336,12 +1336,9 @@ s = &d->ac97; s->pci_dev = &d->dev; c = d->dev.config; - c[0x00] = 0x86; /* vid vendor id intel ro */ - c[0x01] = 0x80; /* intel */ + pci_config_set_vendor_id(c, PCI_VENDOR_ID_INTEL); /* ro */ + pci_config_set_device_id(c, PCI_DEVICE_ID_INTEL_82801AA_5); /* ro */ - c[0x02] = 0x15; /* did device id 82801 ro */ - c[0x03] = 0x24; /* 82801aa */ - c[0x04] = 0x00; /* pcicmd pci command rw, ro */ c[0x05] = 0x00; Index: hw/openpic.c =================================================================== --- hw/openpic.c (revision 6428) +++ hw/openpic.c (working copy) @@ -1017,10 +1017,8 @@ if (opp == NULL) return NULL; pci_conf = opp->pci_dev.config; - pci_conf[0x00] = 0x14; // IBM MPIC2 - pci_conf[0x01] = 0x10; - pci_conf[0x02] = 0xFF; - pci_conf[0x03] = 0xFF; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM); + pci_config_set_device_id(pci_conf, 0xffff); // MPIC2 pci_conf[0x0a] = 0x80; // PIC pci_conf[0x0b] = 0x08; pci_conf[0x0e] = 0x00; // header_type Index: hw/pci.h =================================================================== --- hw/pci.h (revision 6428) +++ hw/pci.h (working copy) @@ -8,7 +8,63 @@ extern target_phys_addr_t pci_mem_base; -/* see pci-ids.txt */ +#define PCI_VENDOR_ID_LSI_LOGIC 0x1000 +#define PCI_DEVICE_ID_LSI_53C895A 0x0012 + +#define PCI_VENDOR_ID_DEC 0x1011 + +#define PCI_VENDOR_ID_CIRRUS 0x1013 + +#define PCI_VENDOR_ID_IBM 0x1014 + +#define PCI_VENDOR_ID_AMD 0x1022 +#define PCI_DEVICE_ID_AMD_LANCE 0x2000 + +#define PCI_VENDOR_ID_HITACHI 0x1054 + +#define PCI_VENDOR_ID_MOTOROLA 0x1057 +#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 +#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 + +#define PCI_VENDOR_ID_APPLE 0x106b +#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 + +#define PCI_VENDOR_ID_SUN 0x108e +#define PCI_DEVICE_ID_SUN_EBUS 0x1000 +#define PCI_DEVICE_ID_SUN_SABRE 0xa000 + +#define PCI_VENDOR_ID_CMD 0x1095 +#define PCI_DEVICE_ID_CMD_646 0x0646 + +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_DEVICE_ID_REALTEK_8139 0x8139 + +#define PCI_VENDOR_ID_XILINX 0x10ee + +#define PCI_VENDOR_ID_MARVELL 0x11ab + +#define PCI_VENDOR_ID_ENSONIQ 0x1274 +#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 + +#define PCI_VENDOR_ID_VMWARE 0x15ad +#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 +#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 +#define PCI_DEVICE_ID_VMWARE_NET 0x0720 +#define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 +#define PCI_DEVICE_ID_VMWARE_IDE 0x1729 + +#define PCI_VENDOR_ID_INTEL 0x8086 +#define PCI_DEVICE_ID_INTEL_82441 0x1237 +#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 +#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 +#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 +#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 +#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 +#define PCI_DEVICE_ID_INTEL_82371AB 0x7111 +#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 +#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 + +/* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */ #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 #define PCI_SUBDEVICE_ID_QEMU 0x1100 @@ -129,6 +185,18 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id, pci_map_irq_fn map_irq, const char *name); +static inline void +pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) +{ + cpu_to_le16wu((uint16_t *)&pci_config[PCI_VENDOR_ID], val); +} + +static inline void +pci_config_set_device_id(uint8_t *pci_config, uint16_t val) +{ + cpu_to_le16wu((uint16_t *)&pci_config[PCI_DEVICE_ID], val); +} + /* lsi53c895a.c */ #define LSI_MAX_DEVS 7 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); Index: hw/eepro100.c =================================================================== --- hw/eepro100.c (revision 6428) +++ hw/eepro100.c (working copy) @@ -422,9 +422,9 @@ logout("%p\n", s); /* PCI Vendor ID */ - PCI_CONFIG_16(PCI_VENDOR_ID, 0x8086); + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); /* PCI Device ID */ - PCI_CONFIG_16(PCI_DEVICE_ID, 0x1209); + pci_config_set_device_id(pci_conf, 0x1209); /* PCI Command */ PCI_CONFIG_16(PCI_COMMAND, 0x0000); /* PCI Status */ Index: hw/ne2000.c =================================================================== --- hw/ne2000.c (revision 6428) +++ hw/ne2000.c (working copy) @@ -790,10 +790,8 @@ devfn, NULL, NULL); pci_conf = d->dev.config; - pci_conf[0x00] = 0xec; // Realtek 8029 - pci_conf[0x01] = 0x10; - pci_conf[0x02] = 0x29; - pci_conf[0x03] = 0x80; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK); + pci_config_set_device_id(pci_conf, 0x8029); // Realtek 8029 pci_conf[0x0a] = 0x00; // ethernet network controller pci_conf[0x0b] = 0x02; pci_conf[0x0e] = 0x00; // header_type Index: hw/versatile_pci.c =================================================================== --- hw/versatile_pci.c (revision 6428) +++ hw/versatile_pci.c (working copy) @@ -124,11 +124,9 @@ isa_mmio_init(base + 0x03000000, 0x00100000); } - d->config[0x00] = 0xee; // vendor_id - d->config[0x01] = 0x10; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX); /* Both boards have the same device ID. Oh well. */ - d->config[0x02] = 0x00; // device_id - d->config[0x03] = 0x03; + pci_config_set_device_id(d->config, 0x0300); // device_id d->config[0x04] = 0x00; d->config[0x05] = 0x00; d->config[0x06] = 0x20; Index: hw/piix_pci.c =================================================================== --- hw/piix_pci.c (revision 6428) +++ hw/piix_pci.c (working copy) @@ -192,10 +192,8 @@ d = pci_register_device(b, "i440FX", sizeof(PCIDevice), 0, NULL, i440fx_write_config); - d->config[0x00] = 0x86; // vendor_id - d->config[0x01] = 0x80; - d->config[0x02] = 0x37; // device_id - d->config[0x03] = 0x12; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441); d->config[0x08] = 0x02; // revision d->config[0x0a] = 0x00; // class_sub = host2pci d->config[0x0b] = 0x06; // class_base = PCI_bridge @@ -337,10 +335,8 @@ piix3_dev = d; pci_conf = d->config; - pci_conf[0x00] = 0x86; // Intel - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x00; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) - pci_conf[0x03] = 0x70; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA pci_conf[0x0b] = 0x06; // class_base = PCI_bridge pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic @@ -361,10 +357,8 @@ piix4_dev = d; pci_conf = d->config; - pci_conf[0x00] = 0x86; // Intel - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x10; // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge - pci_conf[0x03] = 0x71; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_0); // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA pci_conf[0x0b] = 0x06; // class_base = PCI_bridge pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic Index: hw/lsi53c895a.c =================================================================== --- hw/lsi53c895a.c (revision 6428) +++ hw/lsi53c895a.c (working copy) @@ -1963,6 +1963,7 @@ void *lsi_scsi_init(PCIBus *bus, int devfn) { LSIState *s; + uint8_t *pci_conf; s = (LSIState *)pci_register_device(bus, "LSI53C895A SCSI HBA", sizeof(*s), devfn, NULL, NULL); @@ -1971,21 +1972,21 @@ return NULL; } + pci_conf = s->pci_dev.config; + /* PCI Vendor ID (word) */ - s->pci_dev.config[0x00] = 0x00; - s->pci_dev.config[0x01] = 0x10; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_LSI_LOGIC); /* PCI device ID (word) */ - s->pci_dev.config[0x02] = 0x12; - s->pci_dev.config[0x03] = 0x00; + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_LSI_53C895A); /* PCI base class code */ - s->pci_dev.config[0x0b] = 0x01; + pci_conf[0x0b] = 0x01; /* PCI subsystem ID */ - s->pci_dev.config[0x2e] = 0x00; - s->pci_dev.config[0x2f] = 0x10; + pci_conf[0x2e] = 0x00; + pci_conf[0x2f] = 0x10; /* PCI latency timer = 255 */ - s->pci_dev.config[0x0d] = 0xff; + pci_conf[0x0d] = 0xff; /* Interrupt pin 1 */ - s->pci_dev.config[0x3d] = 0x01; + pci_conf[0x3d] = 0x01; s->mmio_io_addr = cpu_register_io_memory(0, lsi_mmio_readfn, lsi_mmio_writefn, s); Index: hw/virtio.c =================================================================== --- hw/virtio.c (revision 6428) +++ hw/virtio.c (working copy) @@ -830,10 +830,8 @@ vdev->vq = qemu_mallocz(sizeof(VirtQueue) * VIRTIO_PCI_QUEUE_MAX); config = pci_dev->config; - config[0x00] = vendor & 0xFF; - config[0x01] = (vendor >> 8) & 0xFF; - config[0x02] = device & 0xFF; - config[0x03] = (device >> 8) & 0xFF; + pci_config_set_vendor_id(config, vendor); + pci_config_set_device_id(config, device); config[0x08] = VIRTIO_PCI_ABI_VERSION; Index: hw/es1370.c =================================================================== --- hw/es1370.c (revision 6428) +++ hw/es1370.c (working copy) @@ -1031,10 +1031,8 @@ } c = d->dev.config; - c[0x00] = 0x74; - c[0x01] = 0x12; - c[0x02] = 0x00; - c[0x03] = 0x50; + pci_config_set_vendor_id(c, PCI_VENDOR_ID_ENSONIQ); + pci_config_set_device_id(c, PCI_DEVICE_ID_ENSONIQ_ES1370); c[0x07] = 2 << 1; c[0x0a] = 0x01; c[0x0b] = 0x04; Index: hw/macio.c =================================================================== --- hw/macio.c (revision 6428) +++ hw/macio.c (working copy) @@ -106,11 +106,10 @@ macio_state->ide_mem_index[i] = -1; /* Note: this code is strongly inspirated from the corresponding code in PearPC */ - d->config[0x00] = 0x6b; // vendor_id - d->config[0x01] = 0x10; - d->config[0x02] = device_id; - d->config[0x03] = device_id >> 8; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); + pci_config_set_device_id(d->config, device_id); + d->config[0x0a] = 0x00; // class_sub = pci2pci d->config[0x0b] = 0xff; // class_base = bridge d->config[0x0e] = 0x00; // header_type Index: hw/vga.c =================================================================== --- hw/vga.c (revision 6428) +++ hw/vga.c (working copy) @@ -2512,10 +2512,8 @@ s->pci_dev = &d->dev; pci_conf = d->dev.config; - pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID) - pci_conf[0x01] = 0x12; - pci_conf[0x02] = 0x11; - pci_conf[0x03] = 0x11; + pci_config_set_vendor_id(pci_conf, 0x1234); // dummy VGA (same as Bochs ID) + pci_config_set_device_id(pci_conf, 0x1111); pci_conf[0x0a] = 0x00; // VGA controller pci_conf[0x0b] = 0x03; pci_conf[0x0e] = 0x00; // header_type Index: hw/sun4u.c =================================================================== --- hw/sun4u.c (revision 6428) +++ hw/sun4u.c (working copy) @@ -365,10 +365,8 @@ PCIDevice *s; s = pci_register_device(bus, "EBUS", sizeof(*s), devfn, NULL, NULL); - s->config[0x00] = 0x8e; // vendor_id : Sun - s->config[0x01] = 0x10; - s->config[0x02] = 0x00; // device_id - s->config[0x03] = 0x10; + pci_config_set_vendor_id(s->config, PCI_VENDOR_ID_SUN); + pci_config_set_device_id(s->config, PCI_DEVICE_ID_SUN_EBUS); s->config[0x04] = 0x06; // command = bus master, pci mem s->config[0x05] = 0x00; s->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error Index: hw/ppc4xx_pci.c =================================================================== --- hw/ppc4xx_pci.c (revision 6428) +++ hw/ppc4xx_pci.c (working copy) @@ -366,6 +366,7 @@ PPC4xxPCIState *controller; int index; static int ppc4xx_pci_id; + uint8_t *pci_conf; controller = qemu_mallocz(sizeof(PPC4xxPCIState)); if (!controller) @@ -378,12 +379,11 @@ controller->pci_dev = pci_register_device(controller->pci_state.bus, "host bridge", sizeof(PCIDevice), 0, NULL, NULL); - controller->pci_dev->config[0x00] = 0x14; // vendor_id - controller->pci_dev->config[0x01] = 0x10; - controller->pci_dev->config[0x02] = 0x7f; // device_id - controller->pci_dev->config[0x03] = 0x02; - controller->pci_dev->config[0x0a] = 0x80; // class_sub = other bridge type - controller->pci_dev->config[0x0b] = 0x06; // class_base = PCI_bridge + pci_conf = controller->pci_dev->config; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM); + pci_config_set_device_id(pci_conf, 0x027f); // device_id + pci_conf[0x0a] = 0x80; // class_sub = other bridge type + pci_conf[0x0b] = 0x06; // class_base = PCI_bridge /* CFGADDR */ index = cpu_register_io_memory(0, pci4xx_cfgaddr_read, Index: hw/gt64xxx.c =================================================================== --- hw/gt64xxx.c (revision 6428) +++ hw/gt64xxx.c (working copy) @@ -1136,10 +1136,8 @@ /* FIXME: Malta specific hw assumptions ahead */ - d->config[0x00] = 0xab; /* vendor_id */ - d->config[0x01] = 0x11; - d->config[0x02] = 0x20; /* device_id */ - d->config[0x03] = 0x46; + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MARVELL); + pci_config_set_device_id(d->config, 0x4620); /* device_id */ d->config[0x04] = 0x00; d->config[0x05] = 0x00; Index: hw/e1000.c =================================================================== --- hw/e1000.c (revision 6428) +++ hw/e1000.c (working copy) @@ -1049,8 +1049,8 @@ pci_conf = d->dev.config; memset(pci_conf, 0, 256); - *(uint16_t *)(pci_conf+0x00) = cpu_to_le16(0x8086); - *(uint16_t *)(pci_conf+0x02) = cpu_to_le16(E1000_DEVID); + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, E1000_DEVID); *(uint16_t *)(pci_conf+0x04) = cpu_to_le16(0x0407); *(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010); pci_conf[0x08] = 0x03; Index: hw/rtl8139.c =================================================================== --- hw/rtl8139.c (revision 6428) +++ hw/rtl8139.c (working copy) @@ -1187,8 +1187,8 @@ s->eeprom.contents[0] = 0x8129; #if 1 // PCI vendor and device ID should be mirrored here - s->eeprom.contents[1] = 0x10ec; - s->eeprom.contents[2] = 0x8139; + s->eeprom.contents[1] = PCI_VENDOR_ID_REALTEK; + s->eeprom.contents[2] = PCI_DEVICE_ID_REALTEK_8139; #endif s->eeprom.contents[7] = s->macaddr[0] | s->macaddr[1] << 8; @@ -3425,10 +3425,8 @@ devfn, NULL, NULL); pci_conf = d->dev.config; - pci_conf[0x00] = 0xec; /* Realtek 8139 */ - pci_conf[0x01] = 0x10; - pci_conf[0x02] = 0x39; - pci_conf[0x03] = 0x81; + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_8139); pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */ pci_conf[0x08] = RTL8139_PCI_REVID; /* PCI revision ID; >=0x20 is for 8139C+ */ pci_conf[0x0a] = 0x00; /* ethernet network controller */ -- Stuart Brady