From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LQn7o-0004sY-Ry for qemu-devel@nongnu.org; Sat, 24 Jan 2009 13:20:56 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LQn7o-0004sK-D2 for qemu-devel@nongnu.org; Sat, 24 Jan 2009 13:20:56 -0500 Received: from [199.232.76.173] (port=33387 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LQn7o-0004sH-8t for qemu-devel@nongnu.org; Sat, 24 Jan 2009 13:20:56 -0500 Received: from hall.aurel32.net ([88.191.82.174]:50782) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LQn7n-0001wZ-RP for qemu-devel@nongnu.org; Sat, 24 Jan 2009 13:20:56 -0500 Date: Sat, 24 Jan 2009 19:20:53 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] sh4: r2d. Endian conversion for peripheral register initialization. Message-ID: <20090124182053.GA14335@volta.aurel32.net> References: <200811031623.mA3GNT12001126@smtp12.dti.ne.jp> <200812141752.mBEHqOKc018785@smtp11.dti.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <200812141752.mBEHqOKc018785@smtp11.dti.ne.jp> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Takashi YOSHII Cc: qemu-devel@nongnu.org On Mon, Dec 15, 2008 at 02:52:24AM +0900, takasi-y@ops.dti.ne.jp wrote: > Add endian conversion to hw/r2d.c which lacks consideration of endian on > setting BSC registers. > > Signed-off-by: Takashi YOSHII > --- Thanks, applied. > Ah, thank you for pointed it out. > > > + cpu_physical_memory_write(SH7750_BCR1_A7,&bcr1,4); > > > + cpu_physical_memory_write(SH7750_BCR2_A7,&bcr2,2); > > > > I pushed this patch but it looks like there may be an endianness problem here. > I found what I wanted might be stl_phys/stw_phys. > > This time I set up big endian target system, and tested both endian. > But, I still in trouble setting up big endian host. > Because I don't have real HW here, I tried qemu sparc, mipsel and ppc, > but none of them are successful, so far. > Could someone tell me which arch is recommended for testing host ? > > Cheers, > /yoshii > > --- > hw/r2d.c | 6 ++---- > 1 files changed, 2 insertions(+), 4 deletions(-) > > diff --git a/hw/r2d.c b/hw/r2d.c > index 5d5eb1e..b3aa6e9 100644 > --- a/hw/r2d.c > +++ b/hw/r2d.c > @@ -238,10 +238,8 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size, > { > int kernel_size; > /* initialization which should be done by firmware */ > - uint32_t bcr1 = 1 << 3; /* cs3 SDRAM */ > - uint16_t bcr2 = 3 << (3 * 2); /* cs3 32-bit */ > - cpu_physical_memory_write(SH7750_BCR1_A7, (uint8_t *)&bcr1, 4); > - cpu_physical_memory_write(SH7750_BCR2_A7, (uint8_t *)&bcr2, 2); > + stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */ > + stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */ > > kernel_size = load_image(kernel_filename, phys_ram_base); > > -- > 1.5.6.3 > > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net