From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LRwas-0006lN-Co for qemu-devel@nongnu.org; Tue, 27 Jan 2009 17:39:42 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LRwar-0006kg-0N for qemu-devel@nongnu.org; Tue, 27 Jan 2009 17:39:42 -0500 Received: from [199.232.76.173] (port=36909 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LRwaq-0006kX-Ls for qemu-devel@nongnu.org; Tue, 27 Jan 2009 17:39:40 -0500 Received: from mx20.gnu.org ([199.232.41.8]:41190) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LRwaq-00051X-Dg for qemu-devel@nongnu.org; Tue, 27 Jan 2009 17:39:40 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LRwap-0002CQ-1E for qemu-devel@nongnu.org; Tue, 27 Jan 2009 17:39:39 -0500 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor Date: Tue, 27 Jan 2009 22:39:35 +0000 References: <1233059726-8566-1-git-send-email-agraf@suse.de> <1233070435.4644.9.camel@frecb07144> <497F5C93.9080609@codemonkey.ws> In-Reply-To: <497F5C93.9080609@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200901272239.36183.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Laurent Vivier > >> I didn't apply this last time because I dislike the idea of adding > >> oodles of CPU definitions for x86. The proper thing to do here is to > >> have an fdt based description of CPU model. That's not to say I won't > >> apply this patch, but I don't like the idea of adding more and more of > >> these things. > > > > Did you try "qemu-system-ppc -cpu ?" ;-) ? > > Which is precisely what I'd like to avoid :-) > > Although this is a bit different. We aren't actually emulating a > phenom. We're just taking what we have and calling it a phenom. I > suspect there's going to be a desire to call whatever we emulate > arbitrary things. I don't think we're likely to want the big list of cpus anyway. The real problem is that the x86 translation code ignores most of the CPU feature bits, and implements everything all the time. Paul