From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LUROU-0003HF-0C for qemu-devel@nongnu.org; Tue, 03 Feb 2009 14:57:14 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LUROT-0003Gg-Bw for qemu-devel@nongnu.org; Tue, 03 Feb 2009 14:57:13 -0500 Received: from [199.232.76.173] (port=53422 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LUROT-0003GZ-5L for qemu-devel@nongnu.org; Tue, 03 Feb 2009 14:57:13 -0500 Received: from hall.aurel32.net ([88.191.82.174]:39711) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LUROS-0007BO-LU for qemu-devel@nongnu.org; Tue, 03 Feb 2009 14:57:12 -0500 Date: Tue, 3 Feb 2009 20:57:08 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Fix compilation of PPC64 targets with DEBUG_TCGV enabled Message-ID: <20090203195708.GD18984@volta.aurel32.net> References: <20090131182125.GA11704@miranda.arrow> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <20090131182125.GA11704@miranda.arrow> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stuart Brady Cc: qemu-devel@nongnu.org On Sat, Jan 31, 2009 at 06:21:25PM +0000, Stuart Brady wrote: > The attached patch fixes compilation of PPC64 targets with DEBUG_TCGV > enabled. > > Signed-off-by: Stuart Brady Thanks, applied. > Index: target-ppc/translate.c > =================================================================== > --- target-ppc/translate.c (revision 6489) > +++ target-ppc/translate.c (working copy) > @@ -6263,7 +6263,7 @@ > t = tcg_temp_new_i32(); > tcg_gen_ld_i32(t, cpu_env, offsetof(CPUState, vscr)); > tcg_gen_extu_i32_i64(cpu_avrl[rD(ctx->opcode)], t); > - tcg_temp_free(t); > + tcg_temp_free_i32(t); > } > > GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) > @@ -6511,7 +6511,7 @@ > GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) > { > TCGv_ptr ra, rb, rd; > - TCGv sh; > + TCGv_i32 sh; > if (unlikely(!ctx->altivec_enabled)) { > gen_exception(ctx, POWERPC_EXCP_VPU); > return; > @@ -6524,7 +6524,7 @@ > tcg_temp_free_ptr(ra); > tcg_temp_free_ptr(rb); > tcg_temp_free_ptr(rd); > - tcg_temp_free(sh); > + tcg_temp_free_i32(sh); > } > > #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ > -- > Stuart Brady > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net