Signed-off-by: Simon Horman Index: qemu/hw/apb_pci.c =================================================================== --- qemu.orig/hw/apb_pci.c 2009-02-23 19:24:40.000000000 +1100 +++ qemu/hw/apb_pci.c 2009-02-23 19:24:42.000000000 +1100 @@ -265,10 +265,10 @@ PCIBus *pci_apb_init(target_phys_addr_t d->config[0x0E] = 0x00; // header_type /* APB secondary busses */ - *bus2 = pci_bridge_init(s->bus, 8, PCI_VENDOR_ID_SUN, + *bus2 = pci_bridge_init(s->bus, PCI_DEVFN((1, 0), PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA, pci_apb_map_irq, "Advanced PCI Bus secondary bridge 1"); - *bus3 = pci_bridge_init(s->bus, 9, PCI_VENDOR_ID_SUN, + *bus3 = pci_bridge_init(s->bus, PCI_DEVFN(1, 1), PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA, pci_apb_map_irq, "Advanced PCI Bus secondary bridge 2"); return s->bus; Index: qemu/hw/mips_malta.c =================================================================== --- qemu.orig/hw/mips_malta.c 2009-02-23 19:24:40.000000000 +1100 +++ qemu/hw/mips_malta.c 2009-02-23 19:24:42.000000000 +1100 @@ -493,7 +493,7 @@ static void network_init (PCIBus *pci_bu if (i == 0 && (!nd->model || strcmp(nd->model, "pcnet") == 0)) /* The malta board has a PCNet card using PCI SLOT 11 */ - devfn = 88; + devfn = PCI_DEVFN(11, 0); pci_nic_init(pci_bus, nd, devfn, "pcnet"); } @@ -904,7 +904,7 @@ void mips_malta_init (ram_addr_t ram_siz hd[i] = NULL; } - piix4_devfn = piix4_init(pci_bus, 80); + piix4_devfn = piix4_init(pci_bus, PCI_DEVFN(10, 0)); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]); Index: qemu/hw/unin_pci.c =================================================================== --- qemu.orig/hw/unin_pci.c 2009-02-23 19:24:40.000000000 +1100 +++ qemu/hw/unin_pci.c 2009-02-23 19:29:47.000000000 +1100 @@ -147,7 +147,7 @@ static CPUReadMemoryFunc *pci_unin_read[ /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) { - return (irq_num + (pci_dev->devfn >> 3)) & 3; + return (irq_num + PCI_SLOT(pci_dev->devfn)) & 3; } static void pci_unin_set_irq(qemu_irq *pic, int irq_num, int level) @@ -186,7 +186,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) /* Uninorth main bus */ s = qemu_mallocz(sizeof(UNINState)); s->bus = pci_register_bus(pci_unin_set_irq, pci_unin_map_irq, - pic, 11 << 3, 4); + pic, PCI_DEVFN(11, 0), 4); pci_mem_config = cpu_register_io_memory(0, pci_unin_main_config_read, pci_unin_main_config_write, s); Index: qemu/hw/piix_pci.c =================================================================== --- qemu.orig/hw/piix_pci.c 2009-02-23 19:25:48.000000000 +1100 +++ qemu/hw/piix_pci.c 2009-02-23 19:26:36.000000000 +1100 @@ -51,7 +51,7 @@ static void piix3_set_irq(qemu_irq *pic, static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) { int slot_addend; - slot_addend = (pci_dev->devfn >> 3) - 1; + slot_addend = PCI_SLOT(pci_dev->devfn) - 1; return (irq_num + slot_addend) & 3; } Index: qemu/hw/grackle_pci.c =================================================================== --- qemu.orig/hw/grackle_pci.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/grackle_pci.c 2009-02-23 19:28:09.000000000 +1100 @@ -96,7 +96,7 @@ static CPUReadMemoryFunc *pci_grackle_re /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) { - return (irq_num + (pci_dev->devfn >> 3)) & 3; + return (irq_num + PCI_SLOT(pci_dev->devfn)) & 3; } static void pci_grackle_set_irq(qemu_irq *pic, int irq_num, int level) Index: qemu/hw/gt64xxx.c =================================================================== --- qemu.orig/hw/gt64xxx.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/gt64xxx.c 2009-02-23 19:28:20.000000000 +1100 @@ -870,7 +870,7 @@ static int pci_gt64120_map_irq(PCIDevice { int slot; - slot = (pci_dev->devfn >> 3); + slot = PCI_SLOT(pci_dev->devfn); switch (slot) { /* PIIX4 USB */ Index: qemu/hw/pci.c =================================================================== --- qemu.orig/hw/pci.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/pci.c 2009-02-23 19:28:41.000000000 +1100 @@ -709,7 +709,7 @@ static void pci_info_device(PCIDevice *d const pci_class_desc *desc; term_printf(" Bus %2d, device %3d, function %d:\n", - d->bus->bus_num, d->devfn >> 3, d->devfn & 7); + d->bus->bus_num, PCI_SLOT(d->devfn), PCI_FUNC(d->devfn)); class = le16_to_cpu(*((uint16_t *)(d->config + PCI_CLASS_DEVICE))); term_printf(" "); desc = pci_class_descriptions; Index: qemu/hw/ppc4xx_pci.c =================================================================== --- qemu.orig/hw/ppc4xx_pci.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/ppc4xx_pci.c 2009-02-23 19:28:55.000000000 +1100 @@ -297,7 +297,7 @@ static void ppc4xx_pci_reset(void *opaqu * may need further refactoring for other boards. */ static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num) { - int slot = pci_dev->devfn >> 3; + int slot = PCI_SLOT(pci_dev->devfn); DPRINTF("%s: devfn %x irq %d -> %d\n", __func__, pci_dev->devfn, irq_num, slot); Index: qemu/hw/prep_pci.c =================================================================== --- qemu.orig/hw/prep_pci.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/prep_pci.c 2009-02-23 19:29:07.000000000 +1100 @@ -121,7 +121,7 @@ static CPUReadMemoryFunc *PPC_PCIIO_read static int prep_map_irq(PCIDevice *pci_dev, int irq_num) { - return (irq_num + (pci_dev->devfn >> 3)) & 1; + return (irq_num + PCI_SLOT(pci_dev->devfn)) & 1; } static void prep_set_irq(qemu_irq *pic, int irq_num, int level) Index: qemu/hw/r2d.c =================================================================== --- qemu.orig/hw/r2d.c 2009-02-23 19:27:49.000000000 +1100 +++ qemu/hw/r2d.c 2009-02-23 19:29:24.000000000 +1100 @@ -187,7 +187,7 @@ static void r2d_pci_set_irq(qemu_irq *p, static int r2d_pci_map_irq(PCIDevice *d, int irq_num) { const int intx[] = { PCI_INTA, PCI_INTB, PCI_INTC, PCI_INTD }; - return intx[d->devfn >> 3]; + return intx[PCI_SLOT(d->devfn)]; } static void r2d_init(ram_addr_t ram_size, int vga_ram_size, -- -- Simon Horman VA Linux Systems Japan K.K., Sydney, Australia Satellite Office H: www.vergenet.net/~horms/ W: www.valinux.co.jp/en