From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LbeEM-0006bb-Bk for qemu-devel@nongnu.org; Mon, 23 Feb 2009 12:04:34 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LbeEL-0006at-5u for qemu-devel@nongnu.org; Mon, 23 Feb 2009 12:04:33 -0500 Received: from [199.232.76.173] (port=44961 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LbeEK-0006ab-Pn for qemu-devel@nongnu.org; Mon, 23 Feb 2009 12:04:32 -0500 Received: from mx20.gnu.org ([199.232.41.8]:26384) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LbeEK-0004ly-7Z for qemu-devel@nongnu.org; Mon, 23 Feb 2009 12:04:32 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LbeEI-0004VH-QP for qemu-devel@nongnu.org; Mon, 23 Feb 2009 12:04:31 -0500 From: Paul Brook Subject: Re: [Qemu-devel] [5849] Change MMIO callbacks to use offsets, =?utf-8?q?=09not_absolute?= addresses. Date: Mon, 23 Feb 2009 17:04:28 +0000 References: <200902231316.15214.paul@nowt.org> <49A2D23F.4020007@earthlink.net> In-Reply-To: <49A2D23F.4020007@earthlink.net> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Message-Id: <200902231704.28500.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Robert Reif On Monday 23 February 2009, Robert Reif wrote: > Paul Brook wrote: > > Should be fixed now. > > Not really. This fixes that specific case but it doesn't fix the > general case where a hardware device needs to call do_unassigned_access > because the hardware device still only has the offset. qemu has precisely zero devices that do this. Also note that the current do_unaligned_access is bogus. You can't raise=20 synchronous exceptions from IO handlers. MMU exceptions have special handli= ng=20 to make sure CPU state is consistent, and trap instructions explicitly=20 synchronise virtual CPU state before raising the exception. > You could store the physical base in each hardware device and recreate > the physical address but that requires changing all hardware devices > that need to do that. =C2=A0Why should the hardware drivers go through the > trouble to recreate a physical address when just a few instructions > before then the physical address was known but irreversibly destroyed > when it was converted to an offset. Part of the reason for making this change is that it's a first step towards= =20 making devices bus agnostic. If you have an IOMMU then the address the devi= ce=20 sees is different to the address the CPU sees. The most effective way to=20 avoid problems with this to have the device not know/care. Paul