From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LfJSd-0002Ps-VJ for qemu-devel@nongnu.org; Thu, 05 Mar 2009 14:42:28 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LfJSc-0002PF-Gq for qemu-devel@nongnu.org; Thu, 05 Mar 2009 14:42:27 -0500 Received: from [199.232.76.173] (port=48544 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LfJSc-0002P8-7X for qemu-devel@nongnu.org; Thu, 05 Mar 2009 14:42:26 -0500 Received: from nan.false.org ([208.75.86.248]:44033) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LfJSb-0003oU-QO for qemu-devel@nongnu.org; Thu, 05 Mar 2009 14:42:25 -0500 Date: Thu, 5 Mar 2009 14:42:22 -0500 From: Daniel Jacobowitz Subject: Re: [Qemu-devel] [PATCH 7/7] PPC64: Don't fault at lwsync Message-ID: <20090305194222.GA3677@caradoc.them.org> References: <1236262454-6293-1-git-send-email-agraf@suse.de> <1236262454-6293-7-git-send-email-agraf@suse.de> <1236262454-6293-8-git-send-email-agraf@suse.de> <200903051644.30883.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200903051644.30883.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, Alexander Graf , Alexander Graf On Thu, Mar 05, 2009 at 04:44:30PM +0000, Paul Brook wrote: > When an MMU exception occurs, qemu figures out the guest location from the > location of the MMU access in guest code (see cpu_restore_state). My guess is > that this breaks when two guest instructions have the same location. I'm not > entirely sure what the correct fix is, or where the bug lies > (cpu_restore_state, gen_intermediate_code_pc, or tcg_gen_code_search_pc) but > hopefully this will point you in the right direction. Automatically pick the second instruction, on the principle that an instruction with no opcodes is unlikely to trigger a synchronous fault? -- Daniel Jacobowitz CodeSourcery