* [Qemu-devel] [6805] tcg: optimize logical operations
@ 2009-03-10 19:37 Aurelien Jarno
2009-03-10 23:26 ` Paul Brook
0 siblings, 1 reply; 2+ messages in thread
From: Aurelien Jarno @ 2009-03-10 19:37 UTC (permalink / raw)
To: qemu-devel
Revision: 6805
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6805
Author: aurel32
Date: 2009-03-10 19:37:39 +0000 (Tue, 10 Mar 2009)
Log Message:
-----------
tcg: optimize logical operations
Simplify nand/nor/eqv and move their optimizations to and/or/xor
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Modified Paths:
--------------
trunk/tcg/tcg-op.h
Modified: trunk/tcg/tcg-op.h
===================================================================
--- trunk/tcg/tcg-op.h 2009-03-10 19:37:28 UTC (rev 6804)
+++ trunk/tcg/tcg-op.h 2009-03-10 19:37:39 UTC (rev 6805)
@@ -436,7 +436,11 @@
static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
+ if (TCGV_EQUAL_I32(arg1, arg2)) {
+ tcg_gen_mov_i32(ret, arg1);
+ } else {
+ tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
@@ -455,7 +459,11 @@
static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
+ if (TCGV_EQUAL_I32(arg1, arg2)) {
+ tcg_gen_mov_i32(ret, arg1);
+ } else {
+ tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
@@ -474,7 +482,11 @@
static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
+ if (TCGV_EQUAL_I32(arg1, arg2)) {
+ tcg_gen_movi_i32(ret, 0);
+ } else {
+ tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
@@ -745,14 +757,22 @@
static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
{
- tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
- tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
+ tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
+ }
}
static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
- tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
+ tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+ }
}
static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -763,8 +783,12 @@
static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
- tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_movi_i64(ret, 0);
+ } else {
+ tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
+ tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+ }
}
static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -943,7 +967,11 @@
static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -955,7 +983,11 @@
static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -967,7 +999,11 @@
static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_movi_i64(ret, 0);
+ } else {
+ tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
+ }
}
static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -1509,64 +1545,38 @@
static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- TCGv_i32 t0;
- t0 = tcg_temp_new_i32();
- tcg_gen_xor_i32(t0, arg1, arg2);
- tcg_gen_not_i32(ret, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_xor_i32(ret, arg1, arg2);
+ tcg_gen_not_i32(ret, ret);
}
static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- TCGv_i64 t0;
- t0 = tcg_temp_new_i64();
- tcg_gen_xor_i64(t0, arg1, arg2);
- tcg_gen_not_i64(ret, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_xor_i64(ret, arg1, arg2);
+ tcg_gen_not_i64(ret, ret);
}
static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- TCGv_i32 t0;
- t0 = tcg_temp_new_i32();
- tcg_gen_and_i32(t0, arg1, arg2);
- tcg_gen_not_i32(ret, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_and_i32(ret, arg1, arg2);
+ tcg_gen_not_i32(ret, ret);
}
static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- TCGv_i64 t0;
- t0 = tcg_temp_new_i64();
- tcg_gen_and_i64(t0, arg1, arg2);
- tcg_gen_not_i64(ret, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_and_i64(ret, arg1, arg2);
+ tcg_gen_not_i64(ret, ret);
}
static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- if (TCGV_EQUAL_I32(arg1, arg2)) {
- tcg_gen_not_i32(ret, arg1);
- } else {
- TCGv_i32 t0;
- t0 = tcg_temp_new_i32();
- tcg_gen_or_i32(t0, arg1, arg2);
- tcg_gen_not_i32(ret, t0);
- tcg_temp_free_i32(t0);
- }
+ tcg_gen_or_i32(ret, arg1, arg2);
+ tcg_gen_not_i32(ret, ret);
}
static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- if (TCGV_EQUAL_I64(arg1, arg2)) {
- tcg_gen_not_i64(ret, arg1);
- } else {
- TCGv_i64 t0;
- t0 = tcg_temp_new_i64();
- tcg_gen_or_i64(t0, arg1, arg2);
- tcg_gen_not_i64(ret, t0);
- tcg_temp_free_i64(t0);
- }
+ tcg_gen_or_i64(ret, arg1, arg2);
+ tcg_gen_not_i64(ret, ret);
}
static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [6805] tcg: optimize logical operations
2009-03-10 19:37 [Qemu-devel] [6805] tcg: optimize logical operations Aurelien Jarno
@ 2009-03-10 23:26 ` Paul Brook
0 siblings, 0 replies; 2+ messages in thread
From: Paul Brook @ 2009-03-10 23:26 UTC (permalink / raw)
To: qemu-devel; +Cc: Aurelien Jarno
On Tuesday 10 March 2009, Aurelien Jarno wrote:
> static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t
> - tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
> - tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
> + if (TCGV_EQUAL_I64(arg1, arg2)) {
This is wrong (and breaks 32-bit hosts).
> static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64
> - tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
> - tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
> + if (TCGV_EQUAL_I64(arg1, arg2)) {
> static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64
> - tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
> - tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
> + if (TCGV_EQUAL_I64(arg1, arg2)) {
These are pointless. The 32-bit ops already perform these simplifications.
Paul
^ permalink raw reply [flat|nested] 2+ messages in thread
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2009-03-10 23:26 ` Paul Brook
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