From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1LpVaV-0007W8-QM
	for qemu-devel@nongnu.org; Thu, 02 Apr 2009 18:40:43 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1LpVaR-0007LB-AZ
	for qemu-devel@nongnu.org; Thu, 02 Apr 2009 18:40:43 -0400
Received: from [199.232.76.173] (port=60675 helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1LpVaR-0007Kx-76
	for qemu-devel@nongnu.org; Thu, 02 Apr 2009 18:40:39 -0400
Received: from mx20.gnu.org ([199.232.41.8]:33397)
	by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32)
	(Exim 4.60) (envelope-from <paul@codesourcery.com>)
	id 1LpVaQ-0000g4-Uy
	for qemu-devel@nongnu.org; Thu, 02 Apr 2009 18:40:39 -0400
Received: from mail.codesourcery.com ([65.74.133.4])
	by mx20.gnu.org with esmtp (Exim 4.60)
	(envelope-from <paul@codesourcery.com>) id 1LpVaP-0006Zv-NH
	for qemu-devel@nongnu.org; Thu, 02 Apr 2009 18:40:38 -0400
From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] PATCH/RFC: PCI memory mapping
Date: Thu, 2 Apr 2009 22:40:34 +0000
References: <1238684238.18745.17.camel@nibbler.dlib.indiana.edu>
In-Reply-To: <1238684238.18745.17.camel@nibbler.dlib.indiana.edu>
MIME-Version: 1.0
Content-Type: text/plain;
  charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline
Message-Id: <200904022340.35427.paul@codesourcery.com>
Reply-To: qemu-devel@nongnu.org
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: qemu-devel@nongnu.org
Cc: Tristan Gingold <gingold@adacore.com>

On Thursday 02 April 2009, Brian Wheeler wrote:
> [first off, if there's an easier way to do this, let me know!]
>
> This patch adds an address mapping function to the PCI bus so the host
> chipset can remap PCI generated addresses to the appropriate physical
> addresses.

This should be integrated with the DMA APIs.  Individual devices must not need 
to be aware of bus bridges. All remapping should be handled by the DMA 
routines.  In principle there's no reason for this to be specific to PCI. 
SPARC machines already have an IOMMU, so you should make sure your solution 
also covers those systems.

I recommend looking back in the list archives, there have been several 
discussions about the requirements for bus address mapping.

Paul