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Date: Wed, 15 Apr 2009 16:45:03 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [7094] target-mips: don't map zero register as a
	TCG global
Message-ID: <20090415144503.GC13794@volta.aurel32.net>
References: <E1LsiAi-0000hG-Q8@cvs.savannah.gnu.org>
	<20090412213544.GA12200@miranda.arrow>
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To: qemu-devel@nongnu.org

On Sun, Apr 12, 2009 at 10:35:45PM +0100, Stuart Brady wrote:
> On Sat, Apr 11, 2009 at 06:43:20PM +0000, Aurelien Jarno wrote:
> > target-mips: don't map zero register as a TCG global
> 
> Just wondering, would it make some small sense to initialise cpu_gpr[0]
> to something?  For instance:
> 
>     TCGV_UNUSED(cpu_gpr[0]);
> 

I did the change mostly to detect wrong use of this register (like it
was before my optimisations commits, hopefully only in read mode). You
are right that to correctly detect it, we should use this macro. This is
fixed in the SVN.

-- 
Aurelien Jarno	                        GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net